NXP Semiconductors UDA1352TS, Техническое описание

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2002 Nov 22 34
NXP Semiconductors Preliminary specification
48 kHz IEC 60958 audio DAC UDA1352TS
12.9 SPDIF status (read-out)
Table 39 Register address 59H
Table 40 Description of register bits
BIT 15 14 13 12 11 10 9 8
Symbol
− − − − − − − −
BIT 7 6 5 4 3 2 1 0
Symbol
− − − − −
BURST_
DET
B_ERR SPDIFIN_
LOCK
BIT SYMBOL DESCRIPTION
15 to 3
−
reserved
2 BURST_DET Burst preamble detection. A 1-bit value to signal whether burst preamble words are
detected in the SPDIF stream or not. If this bit is logic 0, then no preamble words are
detected. If this bit is logic 1, then burst-payload is detected.
1 B_ERR Bit error detection. A 1-bit value to signal whether there are bit errors detected in the
SPDIF stream or not. If this bit is logic 0, then no errors are detected. If this bit is
logic 1, then bi-phase errors are detected.
0 SPDIFIN_LOCK SPDIF lock indicator. A 1-bit value to signal whether the SPDIF decoder block is in
lock or not. If this bit is logic 0, then the decoder block is out-of-lock. If this bit is logic 1,
then the decoder block is in lock.