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NXP Semiconductors
UM11183
KITFS85SKTEVM evaluation board
UM11183
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© NXP B.V. 2019. All rights reserved.
User guide
Rev. 2.0 — 20 February 2019
17 / 50
4.3.5 Jumpers
Figure 16. Evaluation board jumper locations
Table 12. Evaluation board jumper descriptions
Name Function
Pin
number
Jumper/pin function
1−2
Shunt switch SW1 for current > 5.0 A
J5
V
BAT
shunt
3−4
Shunt switch SW1 for current > 5.0 A
1−2
For current measurement (insert amperemeter)
J6
V
SUP
shunt
3−4
For current measurement (insert amperemeter)
1−2
BUCK_INQ tied to VPRE
J8
BUCK3 input
2−3
BUCK_INQ tied to VBOOST
1−2
LDO1_IN connected to V
PRE
J9
LDO1 input
2−3
LDO1_IN connected to VBOOST
J10
V
BAT
jack
Jack
Used for V
BAT
supply using jack connector
1−2
VDDIO tied to LDO1
3−4
VDDIO tied to LDO2
5−6
VDDIO tied to VDDI2C (provided by external regulators)
7−8
VDDIO tied to BUCK3
J11
VDDIO selection
9−10
VDDIO tied to VDDIO external
1−2
Debug pin tied to P5V0_USB (5.0 V provided by USB
connector)
J17
Debug
2−3
Debug pin tied to V
BAT
(through external protection)
Do not use for OTP burning
1−2
VMON4 tied to LDO2
J20
VMON4
2−3
VMON4 tied to LDO1
1−2
VMON1 tied to 0.8 V
J22
VMON1
2−3
VMON1 tied to VPRE