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9.
Check list layout
Table 3.
Layout design-in check list
Check
number
LAYOUT
DESIGN-IN REVIEW CHECK-LIST
Y/N/NA
Customer comments and/or
actions
Check done
by
NXP feedback
1
GENERAL
1.1
Has the number of layers been clearly discussed?
1.2
Has the layout been checked versus NXP reference
board? (i.e
OM15069-
2_K32W061/041_ANTENNA_MODULE)
1.3
Have the HW recommendations of the JN-RM-2078
reference manual been followed?
1.4
Has the correct PCB material been specified?
1.5
Have the correct PCB thicknesses been specified?
2
RF IO
2.1
Is the RF_IO input/output line well sized for 50 ohm?
The line width must be calculated according to the
board thickness and PCB material.
2.2
Are the RF wires as short as possible (wires behave
as antenna so shortening them help to increase EMI
immunity)
2.3
Have vias been avoided in the RF line?
2.4
Has the placement of the RFIO matching network
been strictly copied from the NXP reference module?
3
Crystal reference Oscillator
3.1
Has the 32 MHz XTAL been placed close to the IC?
3.2
Are there GND vias around the 32 MHz XTAL ?
4
Power Supply
4.1
Have all the VDD capacitors been placed as close as
possible to the power pins and voltage regulators
outputs?
4.2
Provide multiple vias in the power lines when power is
routed on several layers
