NEC V854 UPD703006, Руководство пользователя

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242
User’s Manual U11969EJ3V0UM00
CHAPTER 8 SERIAL INTERFACE FUNCTION
Caution In operations during restart, carry out writing of address data to the IIC shift register after
the start conditions trigger is cleared and the start conditions are detected.
(5) Slave address register (SVA)
Slave address register stores slave address of I
2
C bus.
This register can be read/written in 8-/1-bit units. However, bit 0 is fixed to 0.
8.4.5 I
2
C bus functions
(1) Pin configuration
The configuration of the serial clock pin (SCL) and the serial data bus pin (SDA) is as follows.
(a) SCL ............ Pin to input/output serial clock
Output is N-ch open drain both for master and slave. Input is Schmitt input.
(b) SDA ........... I/O multiplexed pin for serial data
Output is N-ch open drain both for master and slave. Input is Schmitt input.
Because the outputs of serial clock line and the serial data bus line are N-ch open drain, external pull-up
resistors are required.
Figure 8-13. Pin Configuration
Clock output
(Clock input)
SCL
SCL
V
DD
(Clock output)
Slave device
Master device
Clock input
Data output
Data input
SDA
SDA
V
DD
Data output
Data input
Address
FFFFF0E6H
7
IIC
6 5 4 3 2 1 0
After reset
00H
IIC07 IIC06 IIC05 IIC04 IIC03 IIC02 IIC01 IIC00
Address
FFFFF0E8H
7
SVA
6 5 4 3 2 1 0
0
After reset
00H
SVA07 SVA06 SVA05 SVA04 SVA03 SVA02 SVA01