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DSP56305 User’s Manual
MOTOROLA
Enhanced Synchronous Serial Interface (ESSI)
GPIO/ESSI Selection and GPIO Usage
7.5.4
ESSI Flag Usage
Two ESSI signals (SC[1:0]) are available for use as serial I/O flags. Their operation is
controlled by the SYN, SCD[1:0], SSC1, and TE[2:1] bits in the CRB/CRA.The control bits
OF[1:0] and status bits IF[1:0] are double-buffered to/from SC[1:0]. Double-buffering the
flags keeps the flags in sync with TX and RX.
The SC[1:0] flags are available in the Synchronous mode only. Each flag can be
separately programmed.
Flag SC0 is enabled when transmitter 1 is disabled (TE1 = 0). The flag’s direction is
selected by the SCD0 bit. When SCD0 is set, SC0 is configured as output. When SCD0 is
cleared, SC0 is configured as input.
Similarly, the SC1 flag is enabled when transmitter 2 is disabled (TE2 = 0) and the SC1
signal is not configured as transmitter drive enable (Bit SSC1 = 0). SC1’s direction is
selected by the SCD1 bit. When SCD1 is set, SC1 is an output flag. When SCD1 is cleared,
SC1 is an input flag.
When programmed as input flags, the value of the SC[1:0] bits are latched at the same
time as the first bit of the receive data word is sampled. Once the input has been latched,
the signal on the input flag signal (SC0 and SC1) can change without affecting the input
flag. The value of SC[1:0] does not change until the first bit of the next data word is
received. When the received data word is latched by RX, the latched values of SC[1:0] are
latched by the SSISR IF[1:0] bits respectively, and can be read by software.
When programed as output flags, the value of the SC[1:0] bits is taken from the value of
the OF[1:0] bits. The value of the OF[1:0] bits is latched when the contents of TX are
transferred to the Transmit Shift Register. The value of SC[1:0] is stable from the time the
first bit of the transmit data word is transmitted until the first bit of the next transmit
data word is transmitted. The OF[1:0] values can be set directly by software. This allows
the DSP56305 to control data transmission by indirectly controlling the value of the
SC[1:0] flags.
7.6
GPIO/ESSI SELECTION AND GPIO USAGE
The GPIO functionality of an ESSI port (ESSI0 is Port C, ESSI1 is Port D) is controlled by
three registers: Port Control Register (PCRC, PCRD), Port Direction Register (PRRC,
PRRD) and Port Data Register (PDRC, PDRD). After a hardware reset, all Port C and
Port D pins are configured as GPIO inputs.
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