Enhanced Synchronous Serial Interface (ESSI)
Operating Modes
MOTOROLA
DSP56305 User’s Manual
7-45
5. ESSI Transmit Last Slot Interrupt
Occurs when the ESSI is in Network mode at the start of the last slot of the frame.
This exception occurs regardless of the Transmit Mask Register setting. The
transmit last slot interrupt may be used to signal that the Transmit Mask Slot
Register can be reset, the DMA channels can be reconfigured, and data memory
pointers can be reassigned. Using the transmit last slot interrupt guarantees that
the previous frame was serviced with the previous setting and the new frame will
be serviced with the new setting without synchronization problems.
Note:
The maximum transmit last slot interrupt service time should not exceed
W – 1 ESSI bits service time (where W is the word length in bits).
6. ESSI Transmit Data
Occurs when the transmit interrupt is enabled, at least one of the enabled
Transmit Data Registers is empty, and no transmitter error conditions exist.
Writing to all the enabled TX registers or to the TSR clears this interrupt. This
error-free interrupt may use a fast interrupt service routine for minimum
overhead (if no more than two transmitters are used).
7.5.2.2
Exception Configuration
To configure an ESSI exception, perform the steps listed below. The register examples to
the right of the steps show register settings for configuring an ESSI0 transmit interrupt
using transmitter 0. The format used is REGISTER (BITFIELD).
1. Configure Interrupt Service Routine (ISR)
a. Load Vector Base Address Register
VBA(23:8)
b. Define I_VEC to be equal to the VBA value (if that is
nonzero). If it is defined, I_VEC must be defined for the
assembler before the interrupt equate file is included.
c. Load the exception vector table entry: two-word fast
interrupt, or jump/branch to subroutine (long interrupt).
p:I_SI0TD
2. Configure interrupt trigger/Preload transmit data
a. Enable and prioritize overall peripheral interrupt
functionality
IPRP(S0L1:0)
b. Write data to all enabled transmit registers.
TX00
c. Enable peripheral interrupt-generating function.
CRB(TE0)
d. Enable specific peripheral interrupt.
CRB0(TIE)
e. Enable peripheral and associated signals.
PCRC(PC5:0)
f. Unmask interrupts at global level.
SR(I1:0)
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