Mitsubishi Electric LC62 CHASSIS XL6500LU, Руководство по обслуживанию

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IC BLOCK DIAGRAMS
ANALOG PCB-MAIN
IC2A0 TC9003AFG
IC2K0,IC6J0 PQM255M2SPQ
IC2L0 TAR5S5
IC590 NC7WZ25K8X
C
L
A
M
P
&
B
I
A
S
S
W
S
W
S
W
S
W
S
W
AGC
AMP
Y-IN
(CVBS)
Y-IN2
(S-Y)
Y-IN3
(D/D2-Y)
C-IN
(S-C)
G-IN
CVBS/Y
C
C/G
Cb/B
Cr/R
Cb-IN
B-IN
Cr-IN
R-IN
8bit
ADC
TOF/ACC
Color System Det.
Multi Color Decorder
YCS
RGB–>CbCr
Matrix
LPF
VBI Data Det.
ID,WSS,CCD,S/N,Macrovision
CbCr SW
Color Level
Contrast/Brightness
NR Mode:
3DNR
Memory
Clock
Gene.
42M
X'tal
Reference
Clock
IIC-BUS
SCL SDA
CTI/TINT
Color Level
LTI/Contrast
Brightness
Sharpness
Mix
FB SW
ITU-R656
/60
Encode
656/60
Format
Vertical
Enhance
AGC Det
AGC AMP2
8bit
ADC
NTSC 3D Comb
Motion Det.
3 Line Comb
8bit
ADC
8bit
ADC
FB-IN Input I/F
Sync Sep
H/V Timing
HD VD
Digital I/F
CbCr
(D)
Y(D2)
Y
(D)
Y
(D)
CbCr
Y
CbCr
Y
CbCr
Y
CbCr
Y
CbCr
CbCr(D)
CbCr(D2)
CbCr
CONTROL
Vo
Nr
GND
Vin
Vc
4 5
3
2
5
4
2
3
VIN
VOUT NOISE
GND
Control Level
Function Table
OFF
ON HIGH
LOW
Operation
CONTROL
Function Table
H : HIGH Logic Level
L : LOW Logic Level
Z : 3-STATE
Inputs Output
OE
An Yn
L
L H
L
H Z
H Z
H
L
L
H
2
4
3
7
8
5
6
OE
A
Y2
GND
VCC
OE2
Y
A2