Chapter 7: I/O Wiring
55
User I/O available on DSPpro-VME (all models):
Bit Port Header Pin Bit Port Header Pin Bit Port Header Pin
0
0
P1 47
8
1
P1 31
16
2
P1 15
1
0
P1 45
9
1
P1 29
17
2
P1 13
2
0
P1 43
10
1
P1 27
18
2
P1 11
3
0
P1 41
11
1
P1 25
19
2
P1 9
4
0
P1 39
12
1
P1 23
20
2
P1 7
5
0
P1 37
13
1
P1 21
21
2
P1 5
6
0
P1 35
14
1
P1 19
22
2
P1 3
7
0
P1 33
15
1
P1 17
23
2
P1 1
User I/O available on +DSPpro-VME (2 or 4-axis only):
Bit Port Header Pin Bit Port Header Pin Bit Port Header Pin
24 3 P3
47 32 4 P3
31 40 5 P3
15
25 3 P3
45 33 4 P3
29 41 5 P3
13
26 3 P3
N/A*
34 4 P3
N/A* 42 5 P3
11
27 3 P3
41 35 4 P3
25 43 5 P3
9
28 3 P3
39 36 4 P3
23 44 5 P3
7
29 3 P3
37 37 4 P3
21 45 5 P3
5
30 3 P3
N/A*
38 4 P3
N/A* 46 5 P3
3
31 3 P3
33 39 4 P3
17 47 5 P3
1
* bits 26, 30, 34, and 38 are not available
Both Dedicated and User I/O signals come directly from 82C55 programmable I/O controllers.
These signals can be programmed in groups of 8 as inputs or outputs. The input state is a high
impedance TTL level input. The output state has TTL logic levels with +/- 2.5 mA drive current
(4.0 mA max). The power up state of all User I/O is high impedance (Input state).
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