SMA1
Data bit structure:
bit
7
…
…
0
MSB
…
…
LSB
CRC
(4 bits)
CRC, namely Cyclic Redundancy Check, is the error checking field resulting from
a “Redundancy Check” calculation performed on the message contents. This is
intended to check whether transmission has been performed properly (inverted
output).
Polynomial: X
4
+X
1
+1 (binary: 10011)
Logic circuit:
7.5 Used registers
Register (hex)
Function
42 - 43
44 … 47
48
49
4D
51 … 53
55
58
78 … 7D
7E - 7F
All registers in this section are listed according to the following scheme:
Function name
[Address, access]
Description of the function and default value.
- Address: register address expressed in hexadecimal notation.
MAN SMA1 E 2.9.odt
7 - BiSS C-mode interface
34 of 48
1st
stage
2nd
stage
3rd
stage
4th
stage
X
0
X
1
X
2
X
3
Input Data (starts from MSB)