Lexicon MPX G2, Руководство по обслуживанию

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Lexicon
6-7
Digital
ARCHITECTURE
The Z80 handles the system software. The 2186 deals with signal routing and non-reverb DSP. The
Lexichip does the reverb. The FPGA soaks up most of the discrete logic, and includes a MIDI UART. The
EPROM holds the program information for the z80 and the 2186 as well as configuration data for the FPGA.
The SRAM holds variables for the Z80 and 2186, and serves as a communication channel between the two
processors.
The Z80 and 2186 share the system address and data busses. This is possible because both processors
have bus request/acknowledge features. The Z80 owns the bus most of the time, but the 2186 takes over
for about 1/4 of each word clock.
Because of the faster timing of the 2186, it is no longer capable of accessing the Lexichip. It can, however,
still access the control and status registers. The 2186 handles many of the real-time system operations,
including refreshing the LED displays, reading and debouncing the switches and encoder, transmitting MIDI
clock, reading the footpedal and front panel pots, and updating the digipots in the analog section. All other
system functions are performed by the Z80.
The 2186 and Lexichip talk through their serial ports, running at 128 fs. This allows up to 8 16-bit channels
of data to pass between the chips in both directions.
Z80-2186 Bus Sharing:
The Z80 and the 2186 are on the system bus. The Z80 owns the bus for about 70% of the time,
surrendering it to the 2186 for a few microseconds every sample period (22 usec). The Z-80 stops
executing when the 2186 owns the bus, so its effective speed is really its clock speed multiplied by the time
on the bus, or around 7 MHz. The 2186, however, runs even when it doesn't own the bus, stopping only
when it has to make an external access.
The exact ratio of Z80 to 2186 time, as well as which chunk of the word clock belongs to which processor,
is programmable. The Lexichip's DEG0 line goes high to tell the Z80 to give the bus to the 2186. When the
2186 is finished, it gives the bus back to the Z80. This flexibility allowed the 2186's time on the bus to be
fine-tuned to a resolution of 128th of a word clock. In order not to interfere with the Z80's access of the
Lexichip, the 2186 is given access roughly halfway through the word clock (while the Lexichip executes
instruction 64), and always surrenders it before the end of the word clock.
This bus-sharing technique creates a problem when we have to sync the Z80 to the Lexichip's execution of
its first instruction. The solution is to send the Lexichip's _WAIT line into the Z80's _BUSREQ input.