20
1.12 Halt of Readout
on the ECL Port
It is possible to momentarily interrupt an ECL port readout in progress in
three different ways.
a.
If a data transfer is authorized by the REN input, this signal should
be released during a time = (WAK re 20 ns) in order to
avoid loss of data. The ECL port outputs and WST are inhibited
when REN is released.
When several 4300B modules are connected on the same ECL port
bus, one must take into account the fact that the REN signal, applied
to the first module, must transit through all the others (PASS output
connected to REN input of the subsequent module). The transit time
between the REN input and the PASS output for an empty module is
3 ns, typical.
b.
By not initiating the WAK in response to a WST. In this case, the data
on the ECL port and the WST remain on as long as a WAK signal is
not received.
c.
By not releasing the WAK signal after a WST. In this case, the WST
is released and the next data are placed on the ECL port output, but
it is only upon release of the WAK that the WST will be turned on
again.
1.13 CAMAC Readout
CAMAC readout of the ADC data by function F(2) A(0 to 15) may be
performed in either random access mode or sequential mode. Selection
of the readout mode is determined by the CSR bit of the Status Register.
CSR = 0 enables random access readout. The channel addressed for
readout is selected by the subaddress A. The Q response to the readout
function is delivered once the data are available as long as a clear
function has not yet been applied. Data compression is suppressed and
all 16 data words may be read. Pedestal subtraction commanded by
CPS may be carried out or not. The data are transferred on lines R1 to
R11 without the channel subaddress (R12 to R16 = 0). CSR =1 enables
sequential readout. Subaddress A has no effect. Passing from one data
word to another is carried out at the end of the readout of the last data
word.
When CCE = 0; data compression is suppressed and the 16 data words
may still be read. Pedestal subtraction commanded by CPS may be
carried out or not. The data are transferred on lines R1 to R11 without
the channel subaddress (R12 through R16 = 0).
When CCE = 1; data compression is enabled and the data <1 are
eliminated from readout. Usually, pedestal substraction will be enabled
(CPS = 1) due to the fact that the ADC pedestals are greater than zero.
If no valid data are available, readout will not take place (no Q response).
The first word to be read is the Header Word composed of the 8 bits of
VSN (Status Register on R1 to R8), the 4 bits of WC (indicating the
number of data words to be read on R12 to R15), and of the identification
bit (R16 = 1). The valid data (from 1 to 16) are then given sequentially
(on R1 to R11) accompanied by the channel subaddress (on R12 to R15,
R16 = 0). See Table 1.1b for data format.
Содержание 4300B
Страница 22: ...25 Figure 1 3 FERA SYSTEM CONNECTIONS ...
Страница 23: ...26 Figure 1 4 MODEL 4301 FERA DRIVER BLOCK DIAGRAM ...
Страница 24: ...27 Figure 1 5 LOCALIZATION OF REMOVABLE RESISTORS AND VGND GND JUMPER ...
Страница 34: ...38 Figure 2 1 MODEL 4300B BLOCK DIAGRAM ...
Страница 35: ...39 Figure 2 2 CHARGE TO TIME CONVERTER BLOCK DIAGRAM AND TIMING ...
Страница 36: ...40 Figure 2 3 TIME TO DIGITAL CONVERTER BLOCK DIAGRAM AND TIMING ...
Страница 37: ...41 APPENDIX 3 1 ECL DIFFERENTIAL I O LEVELS ...
Страница 38: ...42 APPENDIX 3 2 ECL SINGLE ENDED I O LEVELS ...
