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6

 

LatticeEC Advanced Evaluation Board – 

Lattice Semiconductor

Revision C User’s Guide 

 

Table 8. sysIO Standards Supported per Bank

 

Description

Top Side 

Banks 0-1

Right Side 

Banks 2-3

Bottom Side 

Banks 4-5

Left Side 

Banks 6-7

 

Types of I/O Buffers

Single-ended

Single-ended and 
Differential

Single-ended

Single-ended and 
Differential

Output Standards 
Supported

LVTTL
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
LVCMOS12

SSTL18 Class I
SSTL25 Class I, II
SSTL33 Class I, II

HSTL15 Class I, III
HSTL18_I, II, III

SSTL18D Class I,
SSTL25D Class I, II 
SSTL33D Class I, II

HSTL15D Class I, III, 
HSTL18D Class I, III

PCI33
LVDS25E

 

1

 

LVPECL

 

1

 

BLVDS

 

1

 

RSDS

 

1

 

LVTTL
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
LVCMOS12

SSTL18 Class I
SSTL25 Class I, II
SSTL33 Class I, II

HSTL15 Class I, III
HSTL18 Class I, II, III

SSTL18D Class I,
SSTL25D Class I, II
SSTL33D Class I, II

HSTL15D Class I, III
HSTL18D Class I, III

PCI33
LVDS
LVDS25E

 

1

 

LVPECL

 

1

 

BLVDS

 

1

 

RSDS

 

1

 

LVTTL
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
LVCMOS12

SSTL18 Class I
SSTL2 Class I, II
SSTL3 Class I, II

HSTL15 Class I, III
HSTL18 Class I, II, III

SSTL18D Class I,
SSTL25D Class I, II, 
SSTL33D Class I, II

HSTL15D Class I, III 
HSTL18D Class I, III

PCI33
LVDS25E

 

1

 

LVPECL

 

1

 

BLVDS

 

1

 

RSDS

 

1

 

LVTTL
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
LVCMOS12

SSTL18 Class I
SSTL2 Class I, II
SSTL3 Class I, II

HSTL15 Class I, III
HSTL18 Class I, II, III

SSTL18D Class I,
SSTL25D Class I, II, 
SSTL33D_I, II

HSTL15D Class I, III 
HSTL18D Class I, III

PCI33
LVDS
LVDS25E

 

1

 

LVPECL

 

1

 

BLVDS

 

1

 

RSDS

 

1

 

Inputs

All Single-ended, 
Differential

All Single-ended, 
Differential

All Single-ended, 
Differential

All Single-ended, 
Differential

Clock Inputs

All Single-ended, 
Differential

All Single-ended, 
Differential

All Single-ended, 
Differential

All Single-ended, 
Differential

PCI Support

PCI33 with clamp

PCI33 no clamp

PCI33 with clamp

PCI no clamp

LVDS Output Buffers

LVDS (3.5mA) Buffers

LVDS (3.5mA) Buffers

 

1. These differential standards are implemented by using complementary LVCMOS driver with external resistor pack.

Содержание LatticeEC

Страница 1: ...April 2007 EB11_02 4 LatticeEC Advanced Evaluation Board Revision C User s Guide ...

Страница 2: ... programming support SPI3 Flash device included for non volatile configuration storage ispDOWNLOAD cable included 5V AC adapter included PCI edge connector 120 pin for 32 bit PCI interface SODIMM socket supporting 16 bit 200MHz 200 pin DDR SDRAM Onboard FCRAM SPI4 2 interface via VHDM connectors Prototyping area with access to over 150 I O pins SMA connectors included 10 for high speed clock and d...

Страница 3: ...he connection tables listed in this document refer to the LFEC20E device Available I Os and associated sysIO banks may differ for other densities within this device family Programming Headers Two programming headers are provided on the evaluation board providing access to the LatticeEC JTAG port or the SPI Flash device The pinouts for the headers are provided in Table 2 Table 2 JTAG Programming He...

Страница 4: ...r the evaluation board Table 4 Individual Control of Supplies When the evaluation board is inserted into a PCI backplane all onboard power will be derived from the PCI 3 3V power rail The onboard 3 3V regulator U5 will then be automatically be disabled allowing power to be supplied directly from the PCI host system Jumper J32 allows the adjustment of the 2 5V power supply for 2 6V operation This m...

Страница 5: ...O 1 O O O O O O O O VCCIO 2 O O O O O O O O VCCIO 3 O O O O O O O O VCCIO 4 O O O O O O O O VCCIO 5 O O O O O O O O VCCIO 6 O O O O O O O O VCCIO 7 Bank7 O O O O O O O O Note Shown with factory default settings Bank Setting 0 2 5V only FCRAM interface 1 2 5V 2 6V if DDR SDRAM installed in socket J11 2 2 5V if SPI4 2 interface used 3 2 5V if SPI4 2 interface used 3 3V if SPI3 configuration mode use...

Страница 6: ...VDS25E1 LVPECL1 BLVDS1 RSDS1 LVTTL LVCMOS33 LVCMOS25 LVCMOS18 LVCMOS15 LVCMOS12 SSTL18 Class I SSTL2 Class I II SSTL3 Class I II HSTL15 Class I III HSTL18 Class I II III SSTL18D Class I SSTL25D Class I II SSTL33D Class I II HSTL15D Class I III HSTL18D Class I III PCI33 LVDS25E1 LVPECL1 BLVDS1 RSDS1 LVTTL LVCMOS33 LVCMOS25 LVCMOS18 LVCMOS15 LVCMOS12 SSTL18 Class I SSTL2 Class I II SSTL3 Class I II ...

Страница 7: ...e J23 Description LatticeEC Pin sysIO Bank 6 PCI_INTA_N AB12 5 7 PCI_INTC_N Y12 5 15 PCI_RST_N AC13 5 17 PCI_GNT_N AB13 4 20 PCI_AD30 AD14 4 22 PCI_AD28 AB14 4 23 PCI_AD26 Y14 4 25 PCI_AD24 AE15 4 26 PCI_IDSEL AC15 4 28 PCI_AD22 AA15 4 29 PCI_AD20 AF16 4 31 PCI_AD18 AD16 4 32 PCI_AD16 AB16 4 34 PCI_FRAME_N Y16 4 36 PCI_TRDY_N AE17 4 38 PCI_STOP_N AC17 4 43 PCI_PAR Y17 4 44 PCI_AD15 AE18 4 46 PCI_A...

Страница 8: ..._N AA13 4 20 PCI_AD31 AE14 5 21 PCI_AD29 AC14 4 23 PCI_AD27 AA14 4 24 PCI_AD25 AF15 4 26 PCI_CBE3_N AD15 4 27 PCI_AD23 AB15 4 29 PCI_AD21 Y15 4 30 PCI_AD19 AE16 4 32 PCI_AD17 AC16 4 33 PCI_CBE2_N AA16 4 35 PCI_IRDY_N AF17 4 37 PCI_DEVSEL_N AD17 4 40 PCI_PERR_N AB17 4 42 PCI_SERR_N AA17 4 44 PCI_CBE1_N AF18 4 45 PCI_AD14 AD18 4 47 PCI_AD12 AB18 4 48 PCI_AD10 Y18 4 52 PCI_AD8 AE19 4 53 PCI_AD7 AF20 ...

Страница 9: ... 3 A8 SPI4_TDAT_P10 P26 3 A9 SPI4_TDAT_P12 P22 3 A10 SPI4_TDAT_P14 N22 3 B1 SPI4_TDAT_N0 AB26 3 B2 SPI4_TDAT_N2 U24 3 B3 SPI4_TDAT_N4 T25 3 B4 SPI4_TDAT_N6 U21 3 B7 SPI4_TDAT_N8 T24 3 B8 SPI4_TDAT_N10 R26 3 B9 SPI4_TDAT_N12 P23 3 B10 SPI4_TDAT_N14 N23 3 C5 SPI4_TSCLK AC24 3 C6 SPI4_TSTAT0 AC26 3 C10 SPI4_TCTL_P N24 3 D6 SPI4_TSTAT1 AC25 3 D10 SPI4_TCTL_N N25 3 E1 SPI4_TDAT_P1 U22 3 E2 SPI4_TDAT_P3...

Страница 10: ...S termination B10 SPI4_RDAT_N0 D26 2 100 ohm LVDS termination C1 SPI4_RCTL_P M23 2 100 ohm LVDS termination C5 SP4_RSTAT0 C25 2 C6 SPI4_RSCLK D23 2 D1 SPI4_RCTL_N M22 2 100 ohm LVDS termination D5 SPI4_RSTAT1 C26 2 E1 SPI4_RDAT_P15 M24 2 100 ohm LVDS termination E2 SPI4_RDAT_P13 L23 2 100 ohm LVDS termination E3 SPI4_RDAT_P11 J20 2 100 ohm LVDS termination E4 SPI4_RDAT_P9 K24 2 100 ohm LVDS termin...

Страница 11: ...1 13 SODIMM_DQ3 D15 1 14 SODIMM_DQ4 E14 1 17 SODIMM_DQ2 E15 1 18 SODIMM_DQ5 C14 1 19 SODIMM_DQ11 F17 1 20 SODIMM_DQ12 D16 1 23 SODIMM_DQ8 G16 1 24 SODIMM_DQ13 C16 1 25 SODIMM_DQS1 A20 1 26 SODIMM_DM1 E16 1 29 SODIMM_DQ10 G17 1 30 SODIMM_DQ15 C17 1 31 SODIMM_DQ9 F16 1 32 SODIMM_DQ14 D17 1 35 SODIMM_CK0 A15 1 37 SODIMM_CK0_N B15 1 95 SODIMM_CKE1 E17 1 96 SODIMM_CKE0 B17 1 99 SODIMM_A12 D19 1 100 SOD...

Страница 12: ...RAM_DQ2 A13 0 11 FCRAM_DQ3 B13 0 21 FCRAM_A14 A11 0 22 FCRAM_A13 B11 0 23 FCRAM_FN C11 0 24 FCRAM_CS_N D11 0 26 FCRAM_BA0 A10 0 27 FCRAM_BA1 B10 0 28 FCRAM_A10 C10 0 29 FCRAM_A0 D10 0 30 FCRAM_A1 A9 0 31 FCRAM_A2 B9 0 32 FCRAM_A3 C9 0 35 FCRAM_A4 G10 0 36 FCRAM_A5 F10 0 37 FCRAM_A6 E10 0 38 FCRAM_A7 G11 0 39 FCRAM_A8 F11 0 40 FCRAM_A9 E11 0 41 FCRAM_A11 G12 0 42 FCRAM_A12 E12 0 44 FCRAM_PD_N F13 0...

Страница 13: ... 0 F7 0 K3 7 N6 6 U11 6 AA11 5 AE11 5 A5 0 D12 7 F8 0 K4 7 P11 6 U2 6 AB4 6 AE12 5 A6 0 D2 7 F9 0 K5 7 P2 6 U3 6 AB6 5 AE2 5 A7 0 D4 0 G12 7 K6 7 P3 6 U4 6 AB7 5 AE3 5 A8 0 D6 0 G2 7 L1 7 P4 6 U5 6 AB8 5 AE5 5 A16 1 D7 0 G3 7 L2 7 P5 6 V11 6 AB9 5 AE6 5 A17 1 D8 0 G4 7 L3 7 P6 6 V2 6 AB10 5 AE7 5 B12 7 D9 0 G6 7 L4 7 R11 6 W2 6 AB11 5 AE8 5 B3 0 E12 7 G7 0 L5 7 R2 6 W21 3 AC4 6 AE9 5 B4 0 E2 7 G8 ...

Страница 14: ... the FPGA will be master or slave during the transfer Table 17 lists the possible configuration modes A switch in the down position produces a low 0 the up position produces a high 1 Table 17 LatticeEC Configuration Settings LEDs Eight user definable LEDs are provided on the upper left side of the board above SW1 These LEDs are each wired to a separate general purpose I O as defined in Table 18 Th...

Страница 15: ...An option to install these drivers is included as part of the ispVM System setup ispDOWNLOAD Cable pDS4102 DL2A HW7265 DL3A HW USB 1A etc JTAG Download The LatticeEC device can be configured easily via its JTAG port The device is SRAM based so the it must remain powered on to retain its configuration when programmed in this fashion 1 Connect the ispDOWNLOAD cable to the appropriate header JP6 is u...

Страница 16: ... When using a 1x8 download cable connect to the 1x10 header by justifying the alignment to pin 1 VCC 2 Connect the LatticeEC Evaluation Board to an external 5V supply 3 Start the ispVM System software 4 Press the SCAN button located in the toolbar The LatticeEC device should be automatically detected The resulting screen should be similar to Figure 2 Figure 2 ispVM System Interface 5 Double click ...

Страница 17: ...I3 mode by setting the CFG pins of the LatticeEC device 2 Set switch SW4 to position 1 up to enable the SPI3 connections from the programming headers directly to the SPI3 device 3 Connect the ispDOWNLOAD cable to the appropriate header JP6 is used for the 1x10 cable while JP8 is used for the 2x5 version Important Note The board must be un powered when connecting disconnecting or reconnecting the i...

Страница 18: ...tor Dialog 9 Use the pull down menu to in the Device Family field to choose the device FGPA Loader Press OK The resulting dialog should resemble Figure 5 Figure 5 FPGA Loader Setup 10 Choose the Flash Device page and press the Select button 11 Select the SPI Serial Flash family and choose the device SPI M25P80 as shown in Figure 6 Press OK Note It may be necessary to select an alternate SPI3 Flash...

Страница 19: ...the top of the window Browse to the desired bitstream bit file created by the Lattice ispLEVER design tool 14 Press OK to exit the FPGA Loader setup 15 Click the green GO button This will begin the download process into the Flash device 16 Once the download is complete toggle switch SW4 to position 2 to restore the SPI3 Flash connections to the LatticeEC device 17 Cycle the board power The data sh...

Страница 20: ...ernal 5V supply 4 Connect the ispDOWNLOAD cable to the appropriate header JP6 is used for the 1x10 cable while JP8 is used for the 2x5 version Note When using a 1x8 download cable connect to the 1x10 header by justifying the alignment to pin 1 Vcc 5 Start the ispVM System software 6 Press the SCAN button located in the toolbar The LatticeEC device should be automatically detected The resulting scr...

Страница 21: ...evice Access Options Note Selection of the Advanced SPI Flash Programming option allows the user to specify a data file other than the ispVM System default This is necessary for the LatticeEC Advanced Evaluation Board Figure 10 SPI Flash Programmer 8 Choose the CPLD or FPGA Device page as shown in Figure 11 ...

Страница 22: ...eEC Advanced Evaluation Board on the Lattice web site www latticesemi com 10 Select the Configuration Data Setup page as shown in Figure 12 Figure 12 Configuration Data Setup 11 Browse to the desired data file to program into the Flash device 12 Choose the Flash Device page and press the Select button 13 Select the SPI Serial Flash family and choose the device SPI M25P80 as shown in Figure 13 Pres...

Страница 23: ... Corp All Lattice trademarks registered trademarks patents and disclaimers are as listed at www latticesemi com legal All other brand or product names are trademarks or registered trademarks of their respective holders The specifications and information herein are subject to change without notice Description Ordering Part Number China RoHS Environment Friendly Use Period EFUP LatticeEC20 Evaluatio...

Страница 24: ... t a D f o C A G B p f 2 7 6 d r a o B n o i t a u l a v E d e c n a v d A C E e c i t t a L A 8 1 4 2 r e b m e v o N y a d s e n d e W 4 0 0 2 0 k n a B 3 k n a B A G P F x R 2 4 I P S 6 k n a B R D D t r o p p u S x T 2 4 I P S M A R D S I C P t i B 2 3 5 k n a B 7 k n a B 1 k n a B g n i p y t o t o r P 2 k n a B 4 k n a B M A R C F d n o c i m e S e c i t t a L n o i t a r o p r o C r o t c u...

Страница 25: ... 25 24 3 3V_25 25 C BE 3 26 AD 23 27 Ground_28 28 AD 21 29 AD 19 30 3 3V_31 31 AD 17 32 C BE 2 33 Ground_34 34 IRDY 35 3 3V_36 36 DEVSEL 37 Ground_38 38 LOCK 39 PERR 40 3 3V_41 41 SERR 42 3 3V_43 43 C BE 1 44 AD 14 45 Ground_46 46 AD 12 47 AD 10 48 M66EN 49 AD 08 52 AD 07 53 3 3V_54 54 AD 05 55 AD 03 56 Ground_57 57 AD 01 58 VIO_59 59 ACK64 60 5V_61 61 5V_62 62 4 7 C F u 1 0 1 2 9 J 5 0 0 3 1 1 1 ...

Страница 26: ... _ D D V 1 6 6 _ S S V 6 6 3 _ Q D D V 3 0 Q D 2 1 Q D 5 2 Q D 8 3 Q D 1 1 4 Q D 6 5 5 Q D 9 5 6 Q D 2 6 7 Q D 5 6 3 1 A 2 2 4 1 A 1 2 4 _ C N 4 7 _ C N 7 0 1 _ C N 0 1 3 1 _ C N 3 1 4 1 _ C N 4 1 6 1 _ C N 6 1 7 1 _ C N 7 1 9 1 _ C N 9 1 0 2 _ C N 0 2 0 A B 6 2 1 A B 7 2 0 1 A 8 2 0 A 9 2 1 A 0 3 2 A 1 3 3 A 2 3 3 3 _ D D V 3 3 2 1 A 2 4 1 1 A 1 4 9 A 0 4 8 A 9 3 7 A 8 3 6 A 7 3 5 A 6 3 4 A 5 3 4...

Страница 27: ...H 0 1 G 7 H 8 L 4 F 7 F 7 L 6 J 1 D 8 F 1 F 5 K 3 H 4 C 1 B 2 H 3 G 1 H 5 D 4 K 0 1 K 2 F 4 D 3 B 4 H 6 H 6 G 2 B 2 L 6 D 7 C 9 G 5 H 9 H 0 1 J 3 F 6 E 5 J 3 A 7 E 7 D 4 E 0 1 L 7 A 5 C 1 J 8 K 1 L 0 1 B 6 A 8 H 3 E 9 E 5 B 9 K 7 J 9 C 4 B 4 A 3 L 2 D 9 L 6 C 4 G 4 J 3 K 7 B 8 B 2 G 1 C 1 A 6 B 9 J 6 K 6 F 8 J 2 E 2 C 8 G 6 L 8 D 2 J 0 1 C 9 F 8 E 0 1 D 0 1 F 1 E 8 C 5 A 9 A 0 1 A 3 D 3 J 2 K 5 F ...

Страница 28: ... 0 1 2 8 3 C F u 1 0 1 2 9 2 C F u 1 0 1 2 6 P J 0 1 R E D A E H 1 2 3 4 5 6 7 8 9 0 1 9 8 C F u 1 0 1 2 6 3 C F u 1 0 1 2 4 W S A Y E E 1 0 2 4 L T h c t i w S E T D P 4 W S 4 U T 6 W M V 0 8 P 5 2 M o r c i M T S H S A L F l a i r e S I P S S 1 Q 2 W 3 S S V 4 C C V 8 D L O H 7 C 6 D 5 1 0 1 C F u 1 0 1 2 2 7 R 0 0 1 8 2 1 C F u 1 0 1 2 9 D d e R 3 0 6 0 D E L 0 0 1 C F u 1 0 1 2 2 5 C F u 1 0 1...

Страница 29: ...B 6 B 6 C 6 C 6 D 6 D 6 E 6 E 6 G 6 G 6 J 6 J 6 K 6 K 6 L 6 L 6 M 6 M 6 N 6 N 6 P 6 P 6 R 6 R 6 T 6 T 6 A A 6 A A 6 B A 6 B A 6 C A 6 C A 6 D A 6 D A 6 E A 6 E A 6 F A 6 F A 8 3 R K 0 1 2 2 6 R 0 7 C F u 1 0 1 2 6 K N A B 7 K N A B 2 C E F L 2 7 6 A G B p f E 0 5 f o 1 A 3 U 2 7 6 C E 0 2 C E F L 7 _ 2 F E R V A 2 L P 3 E 7 _ 1 F E R V B 2 L P 4 E A 3 L P 1 B B 3 L P 1 C A 4 L P 3 F B 4 L P 3 G A ...

Страница 30: ...A JACK S 1 R64 51K 1 YAGEO 0402 F3 1 5A FUSE Littelfuse 15401 5 1 2 Q2 Si2323DS Vishay Siliconix SOT23 G D S D14 1N5820 J26 CON1 1 C139 10uF 0805 1 2 D13 1N5820 R62 39K 1 YAGEO 0402 F2 3A FUSE Littelfuse 154003 1 2 C9 4 7pF 1 2 U7 TPS64203DVB EN 1 GND 2 FB 3 ISENSE 4 VIN 5 SW 6 D12 1N5820 C15 10uF Size C 1 2 R65 30 1K 1 YAGEO 0402 C12 2 2uF Size B JP2 HEADER 8X2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15...

Страница 31: ...de Figure 21 Mechanical Drawing 5 5 4 4 3 3 2 2 1 1 D D C C B B A A e l t i T v e R r e b m u N t n e m u c o D e z i S t e e h S e t a D f o C g n i w a r D l a c i n a h c e M C 8 8 5 0 0 2 1 2 y r a u n a J y a d i r F a r o p r o C r o t c u d n o c i m e S e c i t t a L n o i t ...

Страница 32: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information Lattice LFECP20E H EV ...

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