COMe-bSL6 – User Guide Rev. 1.4
www.kontron.com
// 42
3.2.3.
External SPI flash on Modules with Intel® ME – in the PRD
If booting from the external (baseboard mounted) SPI flash then exchanging the COM Express® module for another
module of the same type will cause the Intel® Management Engine (ME) to fail during the next start. This is due to the
design of the ME that bounds itself to every module to which it was previously flashed. In the case of an external SPI
flash, this is the module present at flash time.
To avoid this issue, conduct a complete flash of the external SPI flash device after changing the COM Express®
module for another module. If disconnecting and reconnecting the same module again, this step is not necessary.
3.3.
M.A.R.S.
The smart battery implementation for Kontron Computer-on-Modules called Mobile Application for Rechargeable
Systems (M.A.R.S.) is a BIOS extension for an external smart battery manager or charger. M.A.R.S. includes support for
a SMBus charger/selector (e.g. Linear Technology LTC1760 Dual Smart Battery System Manager) and provides ACPI
compatibility to report battery information to the operating system.
Table 26: Reserved SM-Bus Addresses for Smart Battery Solutions on the Carrier
8-bit Address
7-bit Address
Device
12h
0x09
SMART_CHARGER
14h
0x0A
SMART_SELECTOR
16h
0x0B
SMART_BATTERY
3.4.
Fast I2C
Fast I2C supports transfer between components on the same board. The COMe-bSL6 features an on-board I2C
controller connected to the LPC Bus.
The I2C controller supports:
Multimaster transfers
Clock stretching
Collision detection
Interruption on completion of an operation
3.5.
UART
The UART implements an interface for serial communications and supports up to two serial RX/TX ports defined in
the COM Express® specification on pin A98 (SERO_TX) and pin A99 (SERO_RX) for UART0, and pin A101 (SER1_TX) and
pin A102 (SER1_RX) for UART1. The UART controller is fully 16550A compatible.
UART features are:
On-Chip bit rate ( baud rate) generator
No handshake lines
Interrupt function to the host
FIFO buffer for incoming and outgoing data
