886LCD-M Family
KTD-00474-E
Public User Manual
Date: 2005-05-24
Page
28 of 78
4.4.2 LVDS Flat Panel Connector (LVDS)
Note
Type
Signal
Pin
Signal
Type
Note
PWR
+12V
1
2
+12V
PWR
PWR
+12V
3
4
+12V
PWR
PWR
+12V
5
6
GND
PWR
PWR
+5V
7
8
GND
PWR
PWR
LCDVCC
9
10
LCDVCC
PWR
OT
DDC CLK
11
12
DDC DATA
OT
OT
BKLTCTL
13
14
VDD ENABLE
OT
OT
BKLTEN
15
16
GND
PWR
LVDS
LVDS A0-
17
18
LVDS A0+
LVDS
LVDS
LVDS A1-
19
20
LVDS A1+
LVDS
LVDS
LVDS A2-
21
22
LVDS A2+
LVDS
LVDS
LVDS ACLK-
23
24
LVDS ACLK+
LVDS
LVDS
LVDS A3-
25
26
LVDS A3+
LVDS
PWR
GND
27
28
GND
PWR
LVDS
LVDS B0-
29
30
LVDS B0+
LVDS
LVDS
LVDS B1-
31
32
LVDS B1+
LVDS
LVDS
LVDS B2-
33
34
LVDS B2+
LVDS
LVDS
LVDS BCLK-
35
36
LVDS BCLK+
LVDS
LVDS
LVDS B3-
37
38
LVDS B3+
LVDS
PWR
GND
39
40
GND
PWR
Signal Description – LVDS Flat Panel Connector:
Signal
Description
LVDS A0..A3
LVDS A Channel data
LVDS ACLK
LVDS A Channel clock
LVDS B0..B3
LVDS B Channel data
LVDS BCLK
LVDS B Channel clock
BKLTCTL Backlight
control
BKLTEN
Enable backlight signal
VDD ENABLE
Output Display Enable.
LCDVCC
VCC supply to the flat panel. This supply includes power-on/off sequencing.
The flat panel supply may be either 5V DC or 3.3V DC depending on the CMOS
configuration. Maximum load is 1A at both voltages.
DDC CLK
DDC Channel Clock
DDC DATA
DDC Channel Data