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90000 A-Series Service Guide
7
Theory of Operation
The upper acquisition assembly circuitry samples, digitizes, and stores the signals
for channels 3 and 4 while the lower acquisition assembly does the same for
channels 1 and 2. The acquisition boards contain the TUT modules, Onboard ADC,
clock distribution, data management ASICs, external acquisition memory, ADCs,
communication and programming FPGA, and supporting power supply circuitry.
Acquisition board block diagram
Backplane Assembly
The backplane board is essentially a device on the PCI-Express bus connected by
two SATA cables to the motherboard. The backplane board re12V power
through a distribution board from the supply and all voltage are derived from
switches and other circuitry. Most of these are on the backplane board, with some
further distribution and generation done on the acquisition boards.
The backplane board uses three identical buses to communicate with three
different downstream FPGAs. One is used to control the trigger functions on the
backplane board and one is on each of the two acquisition boards. The acquisition
board FPGAs are used to program the parts on the acquisition boards. On
power-up, after the software recognizes the acquisition boards, the driver loads
the trigger FPGA and the acquisition FPGAs using an 8-bit parallel bus with
miscellaneous control signals. There is a separate bus for each FPGA so timing
problems and reflections could be minimized. After programming is complete, the
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