6-12
Programming Options
A low-to-high transition at the input of Port C channel 0 (C0) or Port C
channel 3 (C3) generates an IRQ signal that is stored in the IRQ register
for that channel. You can enable an IRQ register for a particular channel
by writing 0 to the bit for that channel in the IRQ Control register, or you
can disable and clear that IRQ register by writing 1 to that same bit. The
IRQ Control registers are write-only. The I/O addresses of the IRQ
Control register bits for each group are listed in Tables 6-5, 6-6, and 6-7.
Table 6-5. Addresses of IRQ Control Register Bits for a
PIO-SSR-24
Input Channel
Bit #
I/O Address
J1-C0
0
Base a4h
J1-C3
1
Base a4h
Table 6-6. Addresses of IRQ Control Register Bits for a
PIO-SSR-48
Input Channel
Bit #
I/O Address
J1-C0
0
Base a8h
J1-C3
1
Base a8h
J2-C0
2
Base a8h
J2-C3
3
Base a8h
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