REL1.0
Page 84 of 106
RZ/G1H Qseven Development Platform Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Table 30 8bit Camera Connector3 Pin Out (J12)
Pin
No
Pin Name
Signal Name
Signal Type /
Termination
Description
1
STROBE
NC
-
NC.
2
AGND
AGND
Power
Analog Ground.
3
I2C_SDA
I2C2_SDA(GP4_1)
IO, 2.8V OD
I2C2 Data.
4
AVDD
AVDD
O, 2.8V Power
Camera Analog Power Supply.
5
I2C_SCL
I2C2_SCL(GP4_0)
O, 2.8V OD
I2C2 Clock.
6
RESETB
PRESETOUT#
O, 2.8V CMOS
Reset Out, Active Low.
7
VSYNC
GPIO_EXP(GP1_21)
I, 2.8V CMOS
VIN2 Camera Vertical Synchronization.
Note: This pin is optionally connected to
65th pin of expansion connector1 through
resistor and default not populated
8
PWDN
ETH_MAGIC/MD10(GP
2_27)
O, 3.3V CMOS/
10K PD
Active high Camera Power Down.
This pin is connected to GND in camera Add-
On Module to enable the camera always.
9
HSYNC
VI3_HSYNC#(GP1_16)
I, 2.8V CMOS
VIN2 Camera Horizontal Synchronization.
Note: This pin is optionally connected to
35th pin of expansion connector1 through
resistor and default not populated
10
DVDD
DVDD
O, 1.8V Power
Digital Power Supply.
11
DOVDD
DOVDD
O, 2.8V Power
Camera IO Power Supply.
12
DATA9
VI2_G7/QSPI_IO2/VI1
_G7(GP1_7)
I, 2.8V CMOS
VIN2 Camera Data7.
Note: This pin is optionally connected to 1st
pin of expansion connector1 through
resistor and default not populated
13
XCLK
MCLK_CAM3
O, 2.8V CMOS
Camera Reference Clock.
This pin is connected to On-board 26MHz
Oscillator.
14
DATA8
VI2_G6(GP1_6)
I, 2.8V CMOS
VIN2 Camera Data6.
15
DGND
DGND
Power
Digital Ground.
16
DATA7
VI2_G5(GP1_5)
I, 2.8V CMOS
VIN2 Camera Data5.
17
PCLK
VI2_CLK(GP1_11)
I, 2.8V CMOS
VIN2 Camera Pixel Clock.
18
DATA6
VI2_G4(GP1_4)
I, 2.8V CMOS
VIN2 Camera Data4.
19
DATA2
VI2_G0(GP0_27)
I, 2.8V CMOS
VIN2 Camera Data0.
20
DATA5
VI2_G3(GP1_10)
I, 2.8V CMOS
VIN2 Camera Data3.
21
DATA3
VI2_G1(GP0_28)
I, 2.8V CMOS
VIN2 Camera Data1
22
DATA4
VI2_G2(GP0_29)
I, 2.8V CMOS
VIN2 Camera Data2.
23
DATA1
-
NC.
24
DATA0
-
NC.