REL1.0
Page 68 of 106
RZ/G1H Qseven Development Platform Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
2.9.4
JTAG Header (Optional)
A Standard 20-pin ARM JTAG Header is available in RZ/G1H Qseven carrier board for debug purpose. JTAG signals from
Qseven MXM connector is connected to JTAG Header (J16) through 3.3V level Buffer. This JTAG Header (J16) is
physically located at the top of the board as shown below.
As per Qseven specification version 2.0, Debug UART and JTAG interfaces share the same pins in Qseven Edge
connector. Hence either debug UART or JTAG interface can be used at a time. By default, Debug UART (SCIFA2) is
supported in the RZ/G1H Qseven SOM and hence JTAG connector on RZ/G1H Qseven carrier board cannot be used for
debugging.
Figure 27: JTAG Header