REL1.0
Page 42 of 106
RZ/G1H Qseven Development Platform Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
If the 6
th
bit of Board configuration switch is set to OFF position, then PCIe channel0 of Qseven MXM connector is
connected to Mini PCIe connector which is physically located at the bottom of the board as shown below.
Figure 10: Mini PCIe Connector
Table 8: Mini-PCIe Connector Pin Out
Pin
No
Pin Name
Signal Name
Signal Type/
Termination
Description
1
PCIe_WAKE
GPIO_PCIe_WAKE(GP2_14) O, 3.3V CMOS
PCIe WAKE#.
2
+3.3V_aux
VPCIe_3V3
O, 3.3V Power
3.3V Supply Voltage.
3
COEX1
NC.
-
NC.
4
GND
GND
Power
Ground.
5
COEX2
NC.
-
NC.
6
1.5V
VCC_1V5
O, 1.5V Power
1.5V Supply Voltage.
7
CLK_REQ#
CLK_REQ#
O, 3.3V CMOS
Used to enable PCIe Clock.
8
UIM_PWR
NC.
-
NC.
9
GND
GND
Power
Ground.
10
UIM_DATA
NC.
-
NC.
11
REFCLK-
PCIe_REFCLK_DM
O, DIFF
PCIe Clock positive.
12
UIM_CLK
NC.
-
NC.
13
PCIe_REFCLK_DP
O, DIFF
PCIe Clock negative.
