6-4
Intel® PXA27x Processor Family
Optimization Guide
Power Optimization
Selecting the lowest possible run frequency acceptable for applications results in lower core-power
consumption.
For example, many combinations of the L, 2N
1
and A bits in the Core Clock Configuration register
(CCCR) and B bit in the Clock Configuration register (CLKCFG) result in a core frequency of
208 MHz.
•
L=16, N
=1.0, A=0, B=0 configures the run frequency as 208 MHz and a turbo frequency of
208 MHz. The system bus runs at 104 MHz and the memory bus runs at 104 MHz.
•
L=16, N
=1.0, A=0, B=1 configures the run frequency as 208 MHz and a turbo frequency of
208 MHz. The system bus runs at 208 MHz and the memory bus runs at 104 MHz.
•
L=16, N
=1.0, A=1, B=1 configures the run frequency as 208 MHz and a turbo frequency of
208 MHz. The system bus runs at 208 MHz and the memory bus runs at 208 MHz.
•
L=8, N
=2.0, A=0, B=0 configures the run frequency as 104 MHz and a turbo frequency of
208 MHz. The system bus runs at 52 MHz and the memory bus runs at 104 MHz.
In all cases, the Intel XScale® core is running at a frequency of 208 MHz. The tradeoffs between
the four cases are the speed of the system bus and memory bus versus power consumption. The
lower the frequency of the either bus, the lower the core-power consumption. However, if an
application requires minimal memory latency or high-internal throughput, it might be preferable to
run with a higher system-bus frequency or memory bus at the expense of power.
6.2.4.1
Fast-Bus Mode
The system bus frequency can be doubled through the use of CLKCGF[B], refer to the
“CLKCFG
Bit Definitions”
table in the
Intel® PXA27x Processor Family Developer’s Manual
. When this bit
is set, the system-bus speed is doubled (up to allowable maximum of to 208 MHz) and the system-
bus frequency is equal to that of the run mode frequency. Compared to when fast-bus mode is
disabled this substantially increases the maximum bandwidth of the system bus, but increases the
power usage. Refer to the
“Fast-Bus Mode”
table in the
Intel® PXA27x Processor Family
Developer’s Manual
for restrictions and detailed information about this mode.
Note:
CCCR[L] is limited to 16 in fast-bus mode.
6.2.4.2
Half-Turbo Mode
Systems that have high bus usage requirements, but low Intel XScale® core frequency
requirements can benefit from the use of half-turbo mode. This mode causes the Intel XScale®
core to be clocked at half the selected run mode frequency. Only the core frequency is affected by
this. The bus speed configurations are unaffected in this mode. By using this to select a lower core
frequency the power used by the core is minimized. Ensure that the Intel XScale® core frequency
is sufficient for the loading on the core, otherwise system performance is degraded.
Refer to the
“CLKCFG Bit Definitions”
table in the
Intel® PXA27x Processor Family Developer’s
Manual
for information on the bit settings. Refer to the
“Half Turbo Mode”
table in the
Intel®
PXA27x Processor Family Developer’s Manual
for restrictions and detailed information about this
mode.
1.
The value of N used to determine the Turbo Mode frequency is one half the value written to CCCR[2N]
Содержание PXA270
Страница 1: ...Order Number 280004 001 Intel PXA27x Processor Family Optimization Guide April 2004...
Страница 10: ...x Intel PXA27x Processor Family Optimization Guide Contents...
Страница 20: ...1 10 Intel PXA27x Processor Family Optimization Guide Introduction...
Страница 30: ...2 10 Intel PXA27x Processor Family Optimization Guide Microarchitecture Overview...
Страница 48: ...3 18 Intel PXA27x Processor Family Optimization Guide System Level Optimization...
Страница 114: ...5 16 Intel PXA27x Processor Family Optimization Guide High Level Language Optimization...
Страница 122: ...6 8 Intel PXA27x Processor Family Optimization Guide Power Optimization...
Страница 143: ...Intel PXA27x Processor Family Optimization Guide Index 5 Index...
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