Intel® Compute Module MFS5520VI TPS
Table of Contents
Revision 1.5
iii
Intel order number: E64311-007
Table of Contents
1.
Introduction .......................................................................................................................... 1
1.1
Chapter Outline........................................................................................................ 1
1.2
Intel
®
Compute Module Use Disclaimer................................................................... 1
2.
Product Overview................................................................................................................. 2
2.1
Intel
®
Compute Module MFS5520VI Feature Set .................................................... 2
2.2
Compute Module Layout.......................................................................................... 3
2.2.1
Connector and Component Locations ..................................................................... 3
2.2.2
External I/O Connector Locations............................................................................ 3
2.2.3
Compute Module Mechanical Drawings .................................................................. 5
3.
Functional Architecture ....................................................................................................... 6
3.1
Intel
®
Xeon
®
processor ............................................................................................ 7
3.1.1
Processor Support ................................................................................................... 7
3.1.2
Mixed Processor Configuration................................................................................ 7
3.1.3
Turbo Mode ............................................................................................................. 9
3.1.4
Hyper-Threading...................................................................................................... 9
3.1.5
Intel
®
QuickPath Interconnect .................................................................................. 9
3.1.6
Unified Retention System Support......................................................................... 10
3.2
Memory Subsystem ............................................................................................... 11
3.2.1
Intel
®
QuickPath Memory Controller ...................................................................... 11
3.2.2
Publishing Compute Module Memory.................................................................... 11
3.2.3
Memory Map and Population Rules....................................................................... 12
3.2.4
Memory RAS ......................................................................................................... 13
3.2.5
Memory Upgrade Rules......................................................................................... 15
3.3
Intel
®
5520 Chipset IOH......................................................................................... 17
3.4
Intel
®
82801JR I/O Controller Hub (ICH10R)......................................................... 17
3.4.1
PCI Subsystem ...................................................................................................... 18
3.4.2
USB 2.0 Support.................................................................................................... 18
3.5
Integrated Baseboard Management Controller...................................................... 19
3.5.1
Floppy Disk Controller ........................................................................................... 21
3.5.2
Keyboard and Mouse Support ............................................................................... 21
3.5.3
Wake-up Control.................................................................................................... 21
3.6
Video Support ........................................................................................................ 21
3.6.1
Video Modes.......................................................................................................... 21
3.7
Network Interface Controller (NIC) ........................................................................ 22
3.7.1
Direct Cache Access (DCA) .................................................................................. 22
3.8
Intel
®
Virtualization Technology for Directed I/O (Intel
®
VT-d)................................ 22
4.
Connector/Header Locations and Pin-outs ..................................................................... 23
4.1
Board Connector Information................................................................................. 23
