Functional Architecture
Intel® Compute Module MFS5520VI TPS
Revision
1.5
Intel order number: E64311-007
12
3.2.3
Memory Map and Population Rules
The nomenclature for DIMM sockets implemented on the Intel
®
Compute Module MFS5520VI is
detailed in the following figures.
Processor Socket 1
Processor Socket 2
Channel A
Channel B
Channel C
Channel D
Channel E
Channel F
A1 A2 B1 B2 C1
C2 D1
D2 E1 E2 F1
F2
Figure 6. DIMM Nomenclature
AF003098
DIMM B2
DIMM A1
DIMM A2
DIMM B1
DIMM C2
DIMM C1
DIMM F1
DIMM F2
DIMM E1
DIMM D2
DIMM D1
DIMM E2
Figure 7. DIMM Slot Order
3.2.3.1
Memory Subsystem Nomenclature
DIMMs are organized into physical slots on DDR3 memory channels that belong to
processor sockets.
The memory channels from processor socket 1 are identified as Channel A, B, and C.
The memory channels from processor socket 2 are identified as Channel D, E, and F.
