10-9
SERIAL I/O PORT
The SADEN byte is selected so that each slave may be addressed separately. For Slave A, bit 0
(the LSB) is a don't-care bit; for Slaves B and C, bit 0 is a 1. To communicate with Slave A only,
the master must send an address where bit 0 is clear (e.g., 1111 0000).
For Slave A, bit 1 is a 0; for Slaves B and C, bit 1 is a don’t-care bit. To communicate with Slaves
B and C, but not Slave A, the master must send an address with bits 0 and 1 both set (e.g.,
1111 0011).
For Slaves A and B, bit 2 is a don’t-care bit; for Slave C, bit 2 is a 0. To communicate with Slaves
A and B, but not Slave C, the master must send an address with bit 0 set, bit 1 clear, and bit 2 set
(e.g., 1111 0101).
To communicate with Slaves A, B, and C, the master must send an address with bit 0 set, bit 1
clear, and bit 2 clear (e.g., 1111 0001).
10.5.2 Broadcast Address
A broadcast address is formed from the logical OR of the SADDR and SADEN registers with
zeros defined as don't-care bits, e.g.:
The use of don't-care bits provides flexibility in defining the broadcast address, however, in most
applications, a broadcast address is 0FFH.
The following is an example of using broadcast addresses:
For Slaves A and B, bit 2 is a don’t-care bit; for Slave C, bit 2 is set. To communicate with all of
the slaves, the master must send an address FFH.
To communicate with Slaves A and B, but not Slave C, the master can send an address FBH.
SADDR
SADEN
(SADDR) OR (SADEN)
=
=
=
0101 0110
1111 1100
1111 111X
Slave A:
SADDR
SADEN
Broadcast
=
=
=
1111 0001
1111 1010
1111 1X11
Slave C:
SADDR
SADEN
Broadcast
=
=
=
1111 0010
1111 1101
1111 1111
Slave B:
SADDR
SADEN
Broadcast
=
=
=
1111 0011
1111 1001
1111 1X11
Содержание 8XC251SA
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Страница 3: ...May 1996 8XC251SA 8XC251SB 8XC251SP 8XC251SQ Embedded Microcontroller User s Manual...
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Страница 19: ...1 Guide to This Manual...
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Страница 31: ...2 Architectural Overview...
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Страница 41: ...3 Address Spaces...
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Страница 63: ...4 Device Configuration...
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Страница 81: ...5 Programming...
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Страница 103: ...6 Interrupt System...
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Страница 121: ...7 Input Output Ports...
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Страница 133: ...8 Timer Counters and Watchdog Timer...
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Страница 153: ...9 Programmable Counter Array...
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Страница 171: ...10 Serial I O Port...
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Страница 187: ...11 Minimum Hardware Setup...
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Страница 197: ...12 Special Operating Modes...
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Страница 207: ...13 External Memory Interface...
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Страница 239: ...14 Programming and Verifying Nonvolatile Memory...
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Страница 251: ...A Instruction Set Reference...
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Страница 391: ...B Signal Descriptions...
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Страница 401: ...C Registers...
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Страница 437: ...Glossary...
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