TCC (Thermal Compensation Control) bit is not used. It is allowed to be modified by the initiator for
host system device driver compatibility.
DSN (Disable Target Initiated Synchronous Negotiation) bit is not used and ignored internally.
FRDD (Format/Reassign Degrade Disable) bit is not used and ignored internally.
DPSDP (Data Phase Save Data Pointer) bit is not used and ignored internally.
CAEN When set this bit causes the Command Age Limit timer to be used to avoid commands waiting
in the command queue for an indefinite period. When commands have been in the queue for a period of
time greater than the timer limit they will be re-ordered to be executed in on a first come first served
basis. When this bit is reset commands are always executed based on the queue re-ordering rules.
|
IGRA (Ignore Reassigned LBA) bit is valid only when R C bit (Mode Page 1 byte 2 bit 4) is 1.
|
I G R A bit is set to 1 to inhibit jumping to Reassigned LBA while Read command or Read Extended
|
command is executed while R C bit is 1. In this case, data for the LBA is read from defective sector and
|
sent to the Initiator without any correction. Main purpose of the function is to keep continuous read
|
data transfer avoiding time delay due to long seek to access the Reassigned LBA. The function is one of
|
the requirements of Audio Visual application.
|
I G R A bit is set to 0 to specifies the drive shall access Reassigned LBA even if R C bit is 1.
ADC (Adaptive Cache Enable), when set, allows the drive to modify the read-ahead caching algorithm,
ignoring parameters in Page 8. The adaptation is based on analyzing the most recent command history
and the current contents of the cache buffers.
DRD (Disable Read Disconnect) bit is not used. It is allowed to be modified by the initiator for host
system device driver compatibility.
LED Mode is designed to control the operation of a file L E D driver.
−
L E D Mode = 0000b
The C M D A C bit controls the LED.
C M D A C = 1 (Command Active)
C M D A C = 0 (Motor Active)
−
L E D Mode = 0001b (Motor Active)
When the motor is spinning, the L E D is high.
−
L E D Mode = 0010b (Command Active).
When there is a command active or in the queue, the L E D is high.
Command Aging Limit This value is used to control the maximum time a command should wait in the
command queue when the CAEN bit is set. Each unit of this timer is 50ms.
QPE Read Threshold specifies the error reporting threshold for read operations when the QP E bit is set
to one.
QPE Write Threshold specifies the error reporting threshold for write operations when the QP E bit is set
to one.
DRRT (Disable Read Reassign Target) bit is not used. It is allowed to be modified by the initiator for
host system device driver compatibility.
DNR (Disable Nested Reassigns) bit is not used. It is allowed to be modified by the initiator for host
system device driver compatibility.
100
O E M Spec. of DCAS-34330/32160
Содержание DCAS-32160 - Ultrastar 2.1 GB Hard Drive
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Страница 14: ...xii OEM Spec of DCAS 34330 32160...
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Страница 19: ...Part 1 Functional Specification Copyright IBM Corp 1996 5...
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Страница 56: ...6 7 1 2 68 pin Model Figure 35 Outline of 68 pin Model 42 OEM Spec of DCAS 34330 32160...
Страница 57: ...6 7 1 3 80 pin Model Figure 36 Outline of 80 pin Model Specification 43...
Страница 59: ...6 7 3 Interface Connector 6 7 3 1 50 pin Model Figure 39 Interface Connector 50 pin Model Specification 45...
Страница 60: ...6 7 3 2 68 pin Model Figure 40 Interface Connector 68 pin Model 46 OEM Spec of DCAS 34330 32160...
Страница 61: ...6 7 3 3 80 pin Model Figure 41 Interface Connector 80 pin Model Specification 47...
Страница 62: ...6 7 4 Mounting Positions and Tappings Figure 42 Mounting Positions and Tappings 48 OEM Spec of DCAS 34330 32160...
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Страница 71: ...Part 2 SCSI Interface Specification Copyright IBM Corp 1996 57...
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Страница 232: ...IBML Part Number 73H7993 Published in Japan S73H 7993 03...