A AWRE bit is set to one to indicate that the file shall perform automatic reallocation of defective data
blocks during write operations.
ARRE, an Automatic read reallocation enabled bit is set to zero to indicate that the file shall not
perform automatic reallocation of defective data blocks during read operations.
A A R R E bit is set to one to indicate that the file shall perform automatic reallocation of defective data
blocks during read operations.
TB, Transfer Block bit, is set to one to indicate that a data block that is not recovered within the
recovery limits specified shall be transferred to the initiator before C H E C K C O N D I T I O N status is
returned.
A TB bit of zero indicates that such a data block shall not be transferred to the initiator. Data blocks
that can be recovered within the recovery limits are always transferred, regardless of the value of the bit.
RC, A read continuous bit set to 1 requests the Target to transfer the entire requested length of data
without adding delays which would increase or ensure data integrity. This implies that the Target may
send erroneous data. This bit has priority over all other error control bits (PER, DTE, DC R , TB).
Note: The Target implementation of the R C option is to disable error detection of the data fields but
continue normal error detection and recovery for errors occurring in the servo field. If a servo field failure
occurred, then normal D R P could result in considerable recovery action, including proceeding through
all levels of D R P .
R C set to 0 indicates normal interpretation of PER, DTE, DCR, and TB values. The R C bit setting is
used by the Target when reporting errors associated with the transfer of the Initiator's data for the fol-
lowing commands:
|
−
Read (08h)
|
−
Read Extended (28h)
For all other commands, the R C bit setting is unused and treated as 0.
EER,An enable early recovery bit. Must be set to zero , indicating that the file shall use an error
recovery procedure that minimizes the risk of mis-detection or mis-correction during the data transfer.
Data shall not be fabricated.
PER, Post Error bit, is set to one to indicate that the file reports recovered errors.
DTE, Disable Transfer on Error bit, is set to one to indicate that the file terminates the DATA phase
upon detection of a recovered error .
DCR, Disable Correction bit, is set to one to indicate that Error Correction Code is not used for data
error recovery.
A D C R bit of zero indicates that ECC is applied to recover the data.
Read Retry Count sets a limit on the amount of D R P passes the Target attempts when recovering read
errors. One pass through D R P involves executing all steps of D R P . Only values of 00h and 01h are
valid. A value of zero disables all error recovery procedures.
Correction Span field specifies the size, in bits, of the largest data error burst for which data error cor-
rection may be attempted. Any value may be set into this field, including zero. The file will always use
it's default correction capabilities.
Head Offset Count is not supported by the file.
Note: Head Offset is implemented in the read error recovery routine. The user can not modify the
offset value.
Write Retry Count sets a limit on the amount of D R P passes the Target attempts when recovering write
errors. One pass through D R P involves executing all steps of D R P . Only values of 00h and 01h are
valid. A value of zero disables all error recovery procedures.
102
O E M Spec. of DCAS-34330/32160
Содержание DCAS-32160 - Ultrastar 2.1 GB Hard Drive
Страница 2: ......
Страница 14: ...xii OEM Spec of DCAS 34330 32160...
Страница 16: ...2 OEM Spec of DCAS 34330 32160...
Страница 18: ...4 OEM Spec of DCAS 34330 32160...
Страница 19: ...Part 1 Functional Specification Copyright IBM Corp 1996 5...
Страница 20: ...6 OEM Spec of DCAS 34330 32160...
Страница 22: ...8 OEM Spec of DCAS 34330 32160...
Страница 32: ...18 OEM Spec of DCAS 34330 32160...
Страница 34: ...20 OEM Spec of DCAS 34330 32160...
Страница 56: ...6 7 1 2 68 pin Model Figure 35 Outline of 68 pin Model 42 OEM Spec of DCAS 34330 32160...
Страница 57: ...6 7 1 3 80 pin Model Figure 36 Outline of 80 pin Model Specification 43...
Страница 59: ...6 7 3 Interface Connector 6 7 3 1 50 pin Model Figure 39 Interface Connector 50 pin Model Specification 45...
Страница 60: ...6 7 3 2 68 pin Model Figure 40 Interface Connector 68 pin Model 46 OEM Spec of DCAS 34330 32160...
Страница 61: ...6 7 3 3 80 pin Model Figure 41 Interface Connector 80 pin Model Specification 47...
Страница 62: ...6 7 4 Mounting Positions and Tappings Figure 42 Mounting Positions and Tappings 48 OEM Spec of DCAS 34330 32160...
Страница 70: ...56 OEM Spec of DCAS 34330 32160...
Страница 71: ...Part 2 SCSI Interface Specification Copyright IBM Corp 1996 57...
Страница 72: ...58 OEM Spec of DCAS 34330 32160...
Страница 176: ...162 OEM Spec of DCAS 34330 32160...
Страница 178: ...164 OEM Spec of DCAS 34330 32160...
Страница 198: ...184 OEM Spec of DCAS 34330 32160...
Страница 218: ...204 OEM Spec of DCAS 34330 32160...
Страница 228: ...214 OEM Spec of DCAS 34330 32160...
Страница 232: ...IBML Part Number 73H7993 Published in Japan S73H 7993 03...