
1022410 – 0001 Rev. 2
UMOD hardware theory of operation 3–47
Figure 3-27
GIM block diagram
INSERT
DA
T
A
IN
TT
JITTER
A
TTENUA
T
O
R
HDB3/B6ZS/B8ZS
DECODER
USER G703
BIPOLAR
SEND DA
T
A
(SD) PORT
E2/T2
SD
LIU
SELECT
CLOCK
RECOVER
Y
E1/T1
SD
LIU
CLOCK
D
ATA
GIM
CONTROL
LOGIC
TxD
TO
UMOD
MOTHER
BOARD
OR IFU
DROP
DA
T
A
OUT
E1/T1 CLOCK
E1/T1 DA
T
A
E1/T1
IDI
LIU
E1/T1 CLOCK
E1/T1 DA
T
A
USER
G703 BIPOLAR
INSERT
-DA
T
A-IN
(IDI) PORT
INSERT
CLOCK
TO
IFU
FROM
IFU
E1/T1
DDO
LIU
DROP
CLOCK
DROP
DA
T
A
USER
G703 BIPOLAR
DROP-DA
T
A-OUT
(DDO) PORT
USER G703
BIPOLAR
RECEIVE
D
ATA
(RD) PORT
SELECT
E2/T2
RD
LIU
E1/T1
RD
LIU
RxD
RxC
FROM
UMOD
MOTHER
BOARD
OR IFU
E2/T2
CLOCK
E2/T2
D
ATA
FROM/T
O UMOD
MOTHERBOARD
CONTROL
PROCESSOR
CP
CLOCK
D
ATA
READ
WRITE
ADDRESS
RESET
SD-A
SD-B
RD-A
RD-B
8
5
DDO-A
DDO-B
IDI-A
IDI-B