
1022410 – 0001 Rev. 2
3–28 UMOD hardware theory of operation
Figure 3-13
Receive timing generator block diagram
CONTROL
PROCESSOR
NCO
PLL
PHASE
CONTROL
N
20-40 MHz
RX-4NSYM CLK
FIFO
DEMOD SYM DATA
DEMOD SYM CLK
DATA TO CHANNEL DECODER
CONTROL
PROCESSOR
NCO
PHASE
CONTROL
RXR1 CLK
(DTE INT CLK)
ST-TT
(DTE TT)
STATION CLK
RX
DOPPLER
FIFO
DATA FROM CHANNEL DECODER
RX DATA
(DTE RXD)
INFO RATE
OVERHEAD
VITERBI
FRAMING
PUNCTURE
COUNTERS
REED-SOLOMON
RATE
The receive timing generator reference frequency is selectable
from one of the following sources:
•
Satellite clock (recovered symbol clock)
•
External clock—The receive timing generator is
phase-locked to a user-supplied clock which can be either a
terrestrial data clock or a station clock