HUAWEI MU739 HSPA+ LGA Module
Hardware Guide
Description of the Application Interfaces
Issue 01 (2011-08-24)
Huawei Proprietary and Confidential
Copyright © Huawei Technologies Co., Ltd.
36
3.8.2
MIPI_HSI interface
MU739 support MIPI HSI (High-speed Synchronous Serial Interfaces), the maximum
data rates can reach to156 Mbps for TX and 230 Mbps for RX.
Table 3-11
IPC interface signals
Pin
No.
Pin Name
I/
O
Description
DC Characteristics (V)
Min
Typical Max
26 MIPI_HSI_RX_ DATA I
MIPI HS Receive
Data
-0.54
1.8
2.1
28 MIPI_HSI_RX_FLG
I
MIPI HS Receive
Flag
-0.54
1.8
2.1
30 MIPI_HSI_RX_ RDY O MIPI HS Receive
Ready
-0.54
1.8
2.1
33 MIPI_HSI_TX_RDY
I
MIPI HS Transmit
Ready
-0.54
1.8
2.1
34 MIPI_HSI_TX_WAKE I
MIPI HS Transmit
Wake
-0.54
1.8
2.1
35 MIPI_HSI_TX_FLG
O MIPI HS Transmit
Flag
-0.54
1.8
2.1
36 MIPI_HSI_TX_DATA O MIPI HS Transmit
Data
-0.54
1.8
2.1
37 MIPI_HSI_RX_WAKE I
MIPI HS Receive
Wake
-0.54
1.8
2.1
3.9 General Purpose I/O Interface
The LGA module provides 2 GPIO pins for customers to use controlling signals which
are worked at 1.8 V CMOS logic levels. Customers can use AT command to control
the state of logic levels of eight channels GPIO output signal. See the
HUAWEI
MU739 HSPA+ LGA Module AT Command Interface Specification
.
Table 3-12
Signals on the GPIO interface
Pin
No.
Pin
Name
I/O
Description
DC Characteristics (V)
Min
Typical Max
6
GPIO1 I/O
General I/O pins. The
function of these pins has
not been defined. Optional
-0.3
1.8
2.1
16
GPIO2 I/O
General I/O pins. The
function of these pins has
not been defined. Optional
-0.3
1.8
2.1
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