HUAWEI MU739 HSPA+ LGA Module
Hardware Guide
Description of the Application Interfaces
Issue 01 (2011-08-24)
Huawei Proprietary and Confidential
Copyright © Huawei Technologies Co., Ltd.
24
As the PWRDWN_N, RESIN_N signals are relatively sensitive, it is recommended
that you install a 33 pF capacitor near these pins of the interfaces for filtering. In
addition, when you design a circuit on the PCB of the interface board, it is
recommended that the circuit length not exceed 20 mm and that the circuit be kept at
a distance of 2.54 mm (100 mil) at least from the PCB edge. Furthermore, you need to
wrap the area adjacent to the signal wire with a ground wire. Otherwise, the module
may be reset due to interference.
Figure 3-4
Connections of RESIN_N and PWRDWN_N pins
Power-On Time Sequence
After VBAT_PMU has been applied and is stable, the module will wait for an on-event
and if the on signal is available, the module will boot up.
During power on timing, please make sure the VBAT_PMU is stable.
Figure 3-5
Power on timing sequence
High
GND
VBAT_PMU
ON1
ON2_N
40
μ
s
40
μ
s
draft2