General Standards Corporation PCIe-SIO4BX2, Руководство пользователя

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11 Rev NR
Likewise, if a level interrupt is enabled and the interrupt source is true, the interrupt status will be reasserted
immediately after clearing the interrupt, and an additional interrupt will be requested.
2.1.13 Interrupt Edge/Level: Local Offset 0x0068
The Interrupt Edge Register is an information only (read only) register. This register can be used by a generic driver
to determine if the interrupt source is edge or level triggered. Only the USC interrupts are level triggered. All other
interrupt sources on the SIO4BX2 are edge triggered.
2.1.14 Interrupt Hi/Lo: Local Offset 0x006C
The Interrupt Edge Register is an information only register which denotes all interrupt sources as edge triggered.
The Interrupt Hi/Lo Register defines each interrupt source as rising edge or falling edge. For example, a rising edge
of the TX Empty source will generate an interrupt when the TX FIFO becomes empty. Defining the source as falling
edge will trigger an interrupt when the TX FIFO becomes “NOT Empty”.
2.1.15 Channel Pin Source: Local Offset 0x0080 / 0x0084 / 0x0088 / 0x008C
The Channel Pin Source Register configures the Output source for the Clocks, Data, RTS, and DCD outputs.
31 30 29 28 27 26 25 24
Transceiver
Enable
Termination
Disable
Loopback
Enable
DCE/DTE
Mode
Transceiver Protocol Mode
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
INT TxAuxC
Source
TxD
Source
Unused DCD
Source
RTS
Source
USC_DCD
Direction
USC_CTS
Direction
TxC
Source
USC_RXC
Source
USC_TxC
Source
LB X XD
Pin Source Register
D31 Cable Transceiver Enable
Setting this bit turns on the cable transceivers. If this bit is cleared, the transceivers are tristated.
D30
Termination Disable
For RS422/RS485, the receive signals (RxC, RxD, RxAuxC, CTS, and DCD) have built in
termination at the transceivers. These internal terminations may be disabled to allow external
terminations (or no terminations) to be used. Setting this bit will disable the internal transceiver
termination resistors.
D29
External Loopback Mode
When DCE/DTE Mode is enabled (Bit D31=1), this bit will automatically loopback the TxC/RxC,
TxD/RxD, and RTS/CTS signals at the cable (transceivers enabled). This allows the transceivers
to be tested in a standalone mode.
Notes:

The DCE/DTE mode will select the set of signals (DCE or DTE) to be looped back

Since the transceivers will be enabled in this mode, all external cables should be
disconnected to prevent interference from external sources.