CHAPTER 5: SETTINGS
CONTROL ELEMENTS
N60 NETWORK STABILITY AND SYNCHROPHASOR MEASUREMENT SYSTEM – INSTRUCTION MANUAL
5-289
5
BIT COMP 1 ARG B0
to
8BIT COMP 1 ARG B7
— These settings specify FlexLogic operands that provide an eight-bit
representation of the second argument, B, of the comparator. The
8BIT COMP 1 ARG B0
setting represents the least
significant bit, while the
8BIT COMP 1 ARG B6
setting represents the most significant bit. The
8BIT COMP 1 ARG B7
setting is
the sign bit (asserted for negative values). In other words the following convention is used:
Eq. 5-33
8BIT COMP 1 INPUT MODE
— This setting specifies whether a signed or absolute value is used for comparison with the pickup
threshold. This setting applies to the effective operating signal (that is, either A – B or A + B) and not to the individual inputs.
The following figure illustrates an effective operating characteristic resulting from this setting.
The
8BIT COMP 1 Out
actual value, as well as the
8BIT COMP1 BIT0
through
8BIT COMP1 BIT7
FlexLogic operands, are derived
without reference to this setting.
8BIT COMP 1 DIRECTION
— This setting specifies if the element operates if the effective operating signal is above (“Over”) or
below (“Under”) the threshold as illustrated in the following figure.
Figure 5-158: Operating characteristics of the eight-bit comparator
8BIT COMP 1 ADD/SUB
— This setting specifies if the two arguments, A and B, are added or subtracted to form the effective
operating signal. If the FlexLogic operand configured under this setting is logic 0 (“Off”), then the operating signal is A – B. If
the FlexLogic operand configured under this setting is logic 1 (“On”), then the operating signal is A + B. The element
switches between adding and subtracting instantly, without additional delay.
8BIT COMP 1 PICKUP
— This setting specifies the pickup threshold for the comparator. This setting applies to the value scaled
via the
8BIT COMP 1 SCALE FACTOR
setting.
8BIT COMP 1 HYSTERESIS
— Specifies the width of hysteresis for the comparator. The following logic applies:
If
8BIT COMP 1 DIRECTION
= “Over”, then Dropout :=
8BIT COMP 1 PICKUP
–
8BIT COMP 1 HYSTERESIS
If
8BIT COMP1 DIRECTION
= “Under”, then Dropout :=
8BIT COMP 1 PICKUP
+
8BIT COMP 1 HYSTERESIS
8BIT COMP 1 PICKUP DELAY
— Specifies a pickup time delay for the
8BIT COMP 1 OP
FlexLogic operand.
8BIT COMP 1 RESET DELAY
— Specifies a reset time delay for the
8BIT COMP 1 OP
FlexLogic operand.
8BIT COMP 1 SCALE FACTOR
— This setting allows re-scaling the two input arguments and the effective operating quantity.
The same scaling factor applies to all three actual values:
8BIT COMP 1 A
,
8BIT COMP 1 B
and
8BIT COMP 1 Out
. The scaling
enables easier application, testing, and troubleshooting. Also, it facilitates telemetry applications.
8BIT COMP 1 BLOCK
— This setting specifies a FlexLogic operand for blocking the feature based on user-programmable
conditions. When the blocking input is asserted, the element resets its timers, de-asserts the
8BIT COMP 1 PKP
and
8BIT
COMP1 OP
operands (if asserted), clears self-reset targets, logs a ‘blocked’ event if Events are enabled, and becomes
inactive. When unblocked, the element starts operating instantly. If exposed to pickup conditions for an extended period of
time and unblocked, the element picks up and starts timing out at the moment of unblocking.
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