3 Pins
Copyright © Fibocom Wireless Inc.
31
Pin No. Pin Name
I/O
Power
domain
Description
72
DTR/LCD_NRST
DI
1.8 V
Sleep mode control/LCD bus reset
signal
112
RXD
I
1.8 V
Module receives data
113
TXD
O
1.8 V
Module transmits data
Table 34. ADC interface
Pin No. Pin Name
I/O
Power
domain
Description
46
ADC2
AI
0–1.8 V
Analog-to-digital conversion 2
47
ADC1
AI
0–1.8 V
Analog-to-digital conversion 1
121
ADC0
AI
0–1.8 V
Analog-to-digital conversion 0
Table 35. SGMII interface
Pin No. Pin Name
I/O
Power
domain
Description
68
SGMII_RX_P
AI
- -
SGMII differential data receiving
positive signal
69
SGMII_RX_M
AI
- -
SGMII differential data receiving
negative signal
108
SGMII_RST_N
DO 1.8/2.85 V Ethernet reset
109
SGMII_INT_N
DI
1.8 V
Ethernet interrupt
114
SGMII_TX_M
AO - -
SGMII differential data sending
negative signal, close to PHY string
0.1 uF capacitor
115
SGMII_TX_P
AO - -
SGMII differential data sending
Содержание LC116-LA
Страница 1: ...LC116 LA Hardware Guide V1 1...
