RELEASED: 10/2/2006
Page 41
COMMUNICATI0NS
HSD SERIES OPERATION AND MAINTENANCE
This is an unpublished work protected by the United States copyright laws and is proprietary to EMCEE Communications.
Disclosure, copying, reproduction, merger, translation, modification, enhancement or use by anyone other than authorized
employees or licensees of EMCEE Communications without the prior written consent of EMCEE Communications is strictly
prohibited.
Copyright © 2006 EMCEE Communications. All rights reserved.
This copyright notice should not be construed as evidence of publication.
FETs are biased in the same manner. The individual outputs of the dual power
FETs are fed through baluns T1-T3, which provide unbalanced 50 ohm outputs, and
are then coupled together through a micro strip combiner which feeds the amplifier
module RF output at J2. The J2 output level is typically 15 watts average power
(41.76dBm).
S1 is a thermostat mounted to the PCB surface and provides thermal protection for
the amplifier module. When the S1 mounting surface exceeds 85°C, the thermostat
contacts close to provide a ground, indicating an over temperature fault condition.
This signals the control board through the J3-3 output that a temperature fault
condition has occurred. Conversely, if the surface temperature is below 85°C, the
S1 output is open.
The amplifier drain fault circuit is comprised of the circuits around comparator U6. As
long as the amplifier devices are drawing current and the drain voltages are below
11V, U6 provides an open output. U6 compares the drain voltages through CR1-
CR5 against an 11 volt reference. If the amplifier circuit ceases drawing current,
the drain voltage will increase to 12 volts and comparator U6 will provide a ground
indicating an amplifier fault. The U6 output is connected through J3-5 to the control
board.
J3-4 is the -5 volt status output line. It is imperative that the +12 volt supply does not
turn on until the gate bias is present. This is to prevent damage to the power
devices due to excess current draw through the power devices caused by zero gate
bias. If the 12 volt supply comes on and no -5 volt gate bias is present it causes a
high on the gate of Q7 which turns Q7 on and grounds the drain which signals the
control board that the -5 volt supply has failed. The control board then shuts down
the 12 volt supply input. If the -5 volt bias is present, this turns on Q6 which holds
the gate of Q7 low which prevents turn on of Q7 and allows the 12 volt supply to
come on.
U5 and U7 are the -5 and +5 volt regulators which provide a stable voltage for the
amplifier bias circuits for Q1 and Q2 and the supply voltages for buffer amplifiers U2-
U4.
3.15 Amplifier Combiner Module:
P/N 50512000
Schematic Diagram N/A, A4
The power combiner module is a 2-way Wilkinson multi-port combiner network
which exhibits <.25 dB of insertion loss. The power combiner is configured with two
active input ports. Each input port is fed from one Power Amplifier module. The
output of the combiner feeds the input of the metering coupler.
