RELEASED: 10/2/2006
Page 32
COMMUNICATI0NS
HSD SERIES OPERATION AND MAINTENANCE
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which causes the output of U3C to go high placing a high on the input of U3D. Since
both U3D inputs are high, the U3D output is high. The U3D output feeds one input
of AND gate U4C, the other U4C input comes from the flip-flop latch U7A which is
controlled by the temperature status circuitry. If the temperature status is normal
both U4C inputs will now be high as well as the U4C output.
The temperature status inputs to the board are found on J1 and J2 pins 5-8. These
inputs come from the Power Amplifier modules and have the same logic as the -12
volt status lines, open is good and ground is fault. If the status of the amplifier
modules is good, or the modules are not installed, all of the inputs to U1B and U5B
will be held high by the associated pull-up resistors. This constitutes a high on the
U1B and U5B outputs and the output of the following U4D gate. With the U4D
output high, this forces the drain of Q7 low, which connects to the pin 3 clock input
of U7A latch. When power first comes on the latch is set with a high on pin 5 and a
low on pin 6. If a temperature fault occurs, and a resultant low occurs on any gate
input of U1B or U5B, this will put a low on the gates of U4D and Q7. When the gate
of Q7 goes low (shuts off) it puts a high on the drain which triggers the clock input to
the latch. When the latch toggles, U7B pin 5 goes low and pin 6 goes high. U7A is
latched in this state until a reset is received through a fresh system power up or until
the Temperature Reset pushbutton S1 is depressed. Note that there is no automatic
reset for an over-temperature fault, a manual reset using the reset switch or a power
cycle of the main power switch is necessary to reset the fault circuit; this prevents
damage to the amplifiers from an over temperature situation that has not been
corrected.
The U8A gate inputs have the logic input from the status circuits described above
AND the logic output from the VSWR fault circuit latch. The VSWR fault circuit uses
a similar latch circuit formed by the circuitry around U7A. The primary difference is
that this circuit provides for a remote control reset of the VSWR overload circuit
which comes in on pin 11 of J11. The J11-11 input feeds one input of AND gate
U9C, the other input is the VSWR reset switch S2 located on the Control Board.
When the output of the VSWR latch switch U7B is high to input 2 of gate U8A, AND
the output of the previous circuits is also high on input 1, U8A outputs a high to input
1 of gate U9A. The other input to U9A is the Operate/Standby switching circuits at
the inputs to gate U9D.
The gate U9D inputs come from the front panel Operate/Standby switch through J10
pin 12, and the Remote Control board through J11 pin 12. These inputs are
normally held high by pull up resistors R42 and R43, unless either Standby/Operate
switch is grounded. This holds the U9D output high. Then, if both inputs of U9A are
high, this puts a high on the U9A output which turns on the drive on the IF board
through J9-5 and also feeds through J10-6 to the LED on the Display Board; it also
signals the Remote Control board through J11-10. In addition, this output connects
to the main +12 volt power supply turn-on circuit composed of Q11 and Q12. This
high output is connected through J3 pin 5 to the power supply sub-chassis back
