E.F. Johnson Company 5100 Series, Руководство по обслуживанию

Страница: 46 / 173

CIRCUIT DESCRIPTION
5-19
5.9.2 DIGITAL SIGNAL PROCESSING
OVERVIEW
The DSP section consists of a DSP chip (U15)
and the CODEC (U27). The CODEC is a support chip
for the DSP. It provides the interface between the DSP
and the analog signal paths, and between the DSP and
the Digital IF chip on the RF Board. Configuration of
the Digital IF chip is handled primarily by microcon-
troller U2.
In receive mode, the DSP interfaces with the
Digital IF chip IC on the RF Board. The DSP collects
the I and Q samples from the Digital IF chip and
performs channel filtering and frequency discrimina-
tion on the signals. The resulting demodulated signal
is routed to the DSP via the serial port for further
processing. After the DSP processing, the signal is
sent to the CODEC Speaker D/A by writing to a
memory-mapped register. The CODEC then converts
the processed signal from the DSP to an analog signal
and then outputs this signal to a single ended to differ-
ential converter (U8A/D). It is then routed to the UI
board, amplified, and then sent to the speaker.
In transmit mode the microphone signal is
converted to a differential signal on the UI board and
then routed to logic board, converted back to single
ended, and then applied to the CODEC and digitized
by an internal A/D converter. The DSP reads these
values from a memory-mapped register in the
CODEC. After processing, the DSP sends the modula-
tion signal to the CODEC via the serial port. In the
CODEC, the VCO D/A converts the sampled modula-
tion signal into an analog signal and then routes this
signal to the VCO on the RF Board.
5.9.3 RECEIVE SIGNAL PATH
The Digital IF chip on the RF Board provides a
digital back end for the receiver section. It provides a
digital output of I (in phase) and Q (quadrature)
samples which represent the IF signal at the receiver
back end. These samples are routed to the DSP where
the signal is filtered and frequency discriminated to
recover the modulating signal.
5.10 LOGIC BOARD (VERSION A/B)
NOTE: The following describes the Version A and B
logic board described in Section 1.13.
5.10.1 INTRODUCTION
The Digital Signal Processing (DSP) functions
are performed by the DSP chip (U1) and the ADSIC
(U2) with the support of microcontroller U1 on the UI
board. Functions previously performed in hardware
like filtering and limiting are performed by software
running in the DSP chip.
5.10.2 DIGITAL SIGNAL PROCESSING
OVERVIEW
The DSP section consists of a DSP chip (U1) and
the ADSIC (U2). The ADSIC is a support chip for the
DSP. It provides the interface between the DSP and the
analog signal paths, and between the DSP and the
ABACUS chip on the RF Board. Configuration of the
ADSIC is handled primarily by microcontroller U2.
The DSP has access to a few memory-mapped
registers on the ADSIC.
In receive mode, the ADSIC interfaces the DSP
with the ABACUS IC on the RF Board. The ADSIC
collects the I and Q samples from the ABACUS and
performs channel filtering and frequency discrimina-
tion on the signals. The resulting demodulated signal
is routed to the DSP via the serial port for further
processing. After the DSP processing, the signal is
sent to the ADSIC Speaker D/A by writing to a
memory-mapped register. The ADSIC then converts
the processed signal from the DSP to an analog signal
and then outputs this signal to a single ended to differ-
ential converter (U8A/B). It is then routed to the UI
board, amplified, and then sent to the speaker.
In transmit mode the microphone signal is
converted to a differential signal on the UI board and
then routed to logic board, converted back to single
ended, and then applied to the ADSIC and digitized by
an internal A/D converter. The DSP reads these values
from a memory-mapped register in the ADSIC. After
processing, the DSP sends the modulation signal to the
LOGIC BOARD (VERSION C) LOGIC BOARD (VERSION A/B)