E.F. Johnson Company 5100 Series, Руководство по обслуживанию

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5-1
CIRCUIT DESCRIPTION
SECTION 5 CIRCUIT DESCRIPTION
5.1 GENERAL OVERVIEW
5.1.1 INTRODUCTION
The EFJohnson 5100 series digital portable radio
uses a PowerPC
®
-based controller and a Digital Signal
Processor (DSP) to provide the following modes of
operation:
Narrowband Analog - FM modulation with a
maximum deviation of 2.5 kHz. This mode is usually
used in systems where the channel spacing is 12.5
kHz. Call Guard (CTCSS or DCS) subaudible squelch
signaling can be used in this mode.
Wideband Analog - FM modulation with a maximum
deviation of 5 kHz. This mode is usually used in
systems where the channel spacing is 25 kHz or 30
kHz. Call Guard (CTCSS or DCS) subaudible squelch
signaling can be used in this mode.
Project 25 Digital - The voice is digitized, error
corrected, optionally encrypted and transmitted using
C4FM modulation according to the Project 25 stan-
dard. This mode can be used in channel spacings of
12.5 kHz.
The DSP processes the received signals and
generates the appropriate output signals. The micro-
controller controls the hardware and provides an inter-
face between hardware and DSP.
PC Boards
This radio contains the following PC boards:
•
RF Board
•
Logic Board
•
User Interface (UI) Board
•
Five flex circuits that provide interconnection with
the RF board, display, top panel controls, side
buttons, and UDC (accessory) connector.
The User Interface Board provides the input/
output interface for the user. It contains the PowerPC
processor which is the main controller for the trans-
ceiver. It also contains the keypad and has inputs for
the various buttons and switches. It also controls the
display and performs all RS-232 communications
between the radio and remote computer stations for the
purposes of radio programming, tuning, encryption key
loading and software downloading.
The Logic Board contains the digital audio
processing circuitry which includes the CODEC (or
ADSIC with early versions) and DSP devices.
NOTE: The next two sections (5.1.2 and 5.1.3)
describe operation with the revised logic (Version C in
Section 1.13). Generally, the Digital IF chip on the
revised RF board replaces the ABACUS chip on the
early version, and the CODEC on the revised logic
board replaces the ADSIC chip on the early version.
5.1.2 ANALOG MODE
Receive Mode
The signal is routed from the antenna connector
to the RF Board where it is filtered, amplified, and
mixed with the first local oscillator frequency gener-
ated by the synthesizer. The resulting IF signal is also
filtered and amplified and sent to the AD9864 digital
IF chip.
The signal is then mixed with the second local
oscillator frequency to create a second IF signal. The
second IF signal is then sampled and downconverted
to baseband. The baseband signal is then decimated to
a lower sample rate that is selectable at 20 kHz. This
signal is then routed via a serial interface from the IF
chip to the DSP on the logic board.
On the logic board the DSP digitally filters the
input signal and performs frequency discrimination to
obtain the message signal. The DSP first performs a
carrier- detection squelch function on the radio. If a
signal is determined to be present, the audio portion of
the signal is resampled and then filtered appropriately.
The filtered signal is then routed back to a D/A in the
CODEC to produce an analog signal for output to the
audio power amplifier and then the speaker. Any
detected signaling information is decoded and the
resulting information is sent to the microcontroller.