Digital Equipment AXPpci 33, Руководство по конструкции

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Physical Description
2.2.2.17 SIMM Interconnect (J2–J5)
The AXPpci 33 MLB supports up to 256 MB of DRAM memory. On power
up, the CPU automatically determines memory size. The memory SIMM
devices are socketed to allow easy installation by the system integrator or
end user.
The AXPpci 33 is designed to use 70 ns access time SIMMs. The
recommended minimum memory size for the AXPpci 33 depends on the
operation system used:
For Windows NT: 16 MB
For Digital UNIX: 32 MB
Each SIMM has a 36-bit-wide data path. SIMMs must be used in pairs:
each member of the pair has data and ECC bits within that SIMM. Both
members of the pair must be the same size and type. Bank 0, comprised
of J2 and J3, is closest to the DECchip 21066 CPU. Bank 1, comprised of
J4 and J5, is farthest from the CPU.
Note: SIMMs must be 36-bit SIMMs, sometimes called parity SIMMs. 32-
or 33-bit SIMMs will not work.
Table 2–17 lists the SIMM connector pin-outs.
Table 2–17 SIMM Connector Pin-Outs (J2–J5)
Pin
Number
Function
Pin
Number
Function
1 Ground 37 Data
2 Data 38 Data
3 Data 39 Ground
4 Data 40 CAS
5 Data 41 CAS
6 Data 42 CAS
7 Data 43 CAS
8 Data 44 RAS
9 Data 45 RAS
10 +5 V 46 No connection
11 No connection 47 Write
12 A0 48 No connection
13 A1 49 Data
14 A2 50 Data
15 A3 51 Data
16 A4 52 Data
17 A5 53 Data
18 A6 54 Data
19 A10 55 Data
20 Data 56 Data
2–17