FM33256B
Document Number: 001-86213 Rev. *C
Page 4 of 39
Pinout
Figure 1. 14-pin SOIC pinout
CS
SO
CNT
V
X2
X1
PFI
RST
PFO
SI
SCK
ACS
V
1
2
3
4
5
6
7
8
9
10
11
12
13
14
BAK
V
SS
DD
Pin Definitions
Pin Name
I/O Type
Description
CS
Input
Chip Select
. This active LOW input activates the device. When HIGH, the device enters low-power
standby mode, ignores SCK and SI inputs, and the SO output is tristated. When LOW, the device
internally activates the SCK signal. A falling edge on CS must occur before every opcode.
SCK
Input
Serial Clock
. SI and SO activity is synchronized to the serial clock. Inputs are latched on the rising
edge and outputs occur on the falling edge. Because the device is synchronous, the clock frequency
may be any value between 0 and 16 MHz and may be interrupted at any time.
SI
[1]
Input
Serial Input
. Data is input to the device on this pin. The pin is sampled on the rising edge of SCK and
is ignored at other times. It should always be driven to a valid logic level to meet I
DD
specifications.
SO
[1]
Output
Serial Output
. This is the data output pin. It is driven during a read and remains tristated at all other
times. Data transitions are driven on the falling edge of the serial clock.
CNT
Input
Event Counter Input
. This input increments the counter when an edge is detected on this pin. The
polarity is programmable and the counter value is nonvolatile or battery-backed, depending on the
mode. This pin should be tied to ground if unused.
ACS
Output
Alarm/Calibration/SquareWave
. This is an open-drain output that requires an external pull-up
resistor. In normal operation, this pin acts as the active-low alarm output. In Calibration mode,
a 512 Hz square-wave is driven out. In SquareWave mode, the user may select a frequency of 1, 512,
4096, or 32768 Hz to be used as a continuous output. The SquareWave mode is entered by clearing
the AL/SW and CAL bits in the register 18h.
X1, X2
Input/Output 32.768 kHz crystal connection. These pins should be left unconnected if RTC is not used.
RST
Input/Output
Reset
. This active-low output is open drain with weak pull-up. It is also an input when used as a manual
reset. This pin should be left floating if unused.
PFI
Input
Early Power-fail Input
. Typically connected to an unregulated power supply to detect an early power
failure. This pin must be tied to ground if unused.
PFO
Output
Early Power-fail Output
. This pin is the early power-fail output and is typically used to drive a micro-
controller NMI pin. PFO drives LOW when the PFI voltage is < 1.5 V.
V
BAK
Power supply
Backup supply voltage
. Connected to a 3 V battery or a large value capacitor. If no backup supply
is used, this pin should be tied to V
SS
and the VBC bit should be cleared in the RTC register 18h. The
trickle charger is UL recognized and ensures no excessive current when using a lithium battery.
V
SS
Power supply Ground for the device. Must be connected to the ground of the system.
V
DD
Power supply Power supply input to the device.
Note
1. SI may be connected to SO for a single pin data interface
.
