FM33256B
256-Kbit (32 K × 8) Integrated Processor
Companion with F-RAM
Cypress Semiconductor Corporation
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Document Number: 001-86213 Rev. *C
Revised August 5, 2015
256-Kbit (32 K × 8) Serial (SPI) F-RAM
Features
■
256-Kbit ferroelectric random access memory (F-RAM)
❐
Logically organized as 32 K × 8
❐
High-endurance 100 trillion (10
14
) read/writes
❐
151-year data retention (See the
Data Retention and
Endurance
table)
❐
NoDelay™ writes
❐
Advanced high-reliability ferroelectric process
■
High Integration Device Replaces Multiple Parts
❐
Serial nonvolatile memory
❐
Real time clock (RTC) with alarm
❐
Low V
DD
detection drives reset
❐
Watchdog window timer
❐
Early power-fail warning / NMI
❐
16-bit nonvolatile event counter
❐
Serial number with write-lock for security
■
Real-time Clock/Calendar
❐
Backup current at 2 V: 1.15
µ
A at +25
°
C
❐
Seconds through centuries in BCD format
❐
Tracks leap years through 2099
❐
Uses standard 32.768 kHz crystal (6 pF/12.5 pF)
❐
Software calibration
❐
Supports battery or capacitor backup
■
Processor Companion
❐
Active-low reset output for V
DD
and watchdog
❐
Programmable low-V
DD
reset thresholds
❐
Manual reset filtered and debounced
❐
Programmable watchdog window timer
❐
Nonvolatile event counter tracks system intrusions or other
events
❐
Comparator for power-fail interrupt or other use
❐
64-bit programmable serial number with lock
■
Fast serial peripheral interface (SPI)
❐
Up to 16-MHz frequency
❐
RTC, Supervisor controlled via SPI interface
❐
Supports SPI mode 0 (0, 0) and mode 3 (1, 1)
■
Low power consumption
❐
1.1 mA active current at 1 MHz
❐
150
µ
A standby current
■
Operating voltage: V
DD
= 2.7 V to 3.6 V
■
Industrial temperature: –40
°
C to +85
°
C
■
14-pin small outline integrated circuit (SOIC) package
■
Restriction of hazardous substances (RoHS) compliant
■
Underwriters laboratory (UL) recognized
Functional Overview
The FM33256B device integrates F-RAM memory with the most
commonly needed functions for processor-based systems.
Major features include nonvolatile memory, real time clock,
low-V
DD
reset, watchdog timer, nonvolatile event counter,
lockable 64-bit serial number area, and general purpose
comparator that can be used for a power-fail (NMI) interrupt or
any other purpose.
The FM33256B is a 256-Kbit nonvolatile memory employing an
advanced ferroelectric process. A ferroelectric random access
memory or F-RAM is nonvolatile and performs reads and writes
similar to a RAM. It provides reliable data retention for 151 years
while eliminating the complexities, overhead, and system-level
reliability problems caused by other nonvolatile memories. The
FM33256B is capable of supporting 10
14
read/write cycles, or
100 million times more write cycles than EEPROM.
The real time clock (RTC) provides time and date information in
BCD format. It can be permanently powered from an
external
backup voltage source, either a battery or a capacitor. The
timekeeper uses a common external 32.768 kHz crystal and
provides a calibration mode that allows software adjustment of
timekeeping accuracy.
The processor companion includes commonly needed CPU
support functions. Supervisory functions include a reset output
signal controlled by either a low V
DD
condition or a watchdog
timeout. RST goes active when V
DD
drops below a
programmable threshold and remains active for 100 ms (max.)
after V
DD
rises above the trip point. A programmable watchdog
timer runs from 60 ms to 1.8 seconds. The timer may also be
programmed for a delayed start, which functions as a window
timer. The watchdog timer is optional, but if enabled it will assert
the reset signal for 100 ms if not restarted by the host within the
time window. A flag-bit indicates the source of the reset.
A comparator on PFI compares an external input pin to the
onboard 1.5 V reference. This is useful for generating a
power-fail interrupt (NMI) but can be used for any purpose. The
family also includes a programmable 64-bit serial number that
can be locked making it unalterable. Additionally it offers an
event counter that tracks the number of rising or falling edges
detected on a dedicated input pin. The counter can be
programmed to be nonvolatile under V
DD
power or
battery-backed using only V
BAK
. If V
BAK
is connected to a battery
or capacitor, then events will be counted even in the absence of
V
DD
.
For a complete list of related documentation, click
here
.
