Cypress CY8CKIT-040 PSoC 4000 Pioneer Kit, Руководство пользователя

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CY8CKIT-040 PSoC
®
4000 Pioneer Kit Guide, Doc. # 001-91316 Rev. *F 116
Advanced Topics
2. From the Components Catalog , place an I
2
C (SCB mode) Component in the TopDesign from
Communication > I
2
C > I
2
C (SCB mode) [<version>] and configure it as I
2
C in the Configura-
tion tab with the parameters shown in Figure 6-17 .
Figure 6-17. I
2
C Master Configuration
3. Select Pins 1[2] and 1[3] as the I
2
C pins in the Pins tab of the .cydwr file, as shown in
Figure 6-18 .
Figure 6-18. Pin Selection
4. Place the code available in Example_FRAM-main.c, which is attached to this PDF document, in
the main.c file.
5. Build the project by choosing Build > Build Project or pressing [Shift] F6] . After the project
builds without any errors and warnings, program the device by pressing [Ctrl] F5] through the
MiniProg3 or PSoC 5LP programmer in the kit.
Note: A warning may appear on the I
2
C input clock. This is because to generate a 100-kbps I
2
C
clock, the block needs a 1.6-MHz signal, which cannot be derived from the default HFCLK setting
of 12 MHz. To remove the warning, go to
<project_name>.cydwr > Clocks and then double-click
HFCLK . Set the IMO to 32 MHz and HFCLK divider to ' 2 ' in the window that appears (see
Figure 6-7 ). This generates a 16-MHz HFCLK; using a divider of 10, the 1.6-MHz clock required
for I
2
C block will be generated.
6. Open BCP and configure the I
2
C protocol as defined in Using PSoC 5LP as a USB-I2C Bridge on
page 105 .