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2. The PCI Express Ports are visible only if a device is attached behind them to the PCI Express Slot on the carrier board.
3. The table represents a case when a single function PCI/PCIe device is connected to all possible slots on the carrier board. The given bus
numbers will change based on actual hardware configuration.
8.5
PCI Interrupt Routing Map
Table 34 PCI Interrupt Routing Map
PIRQ PCI
BUS
INT
Line ¹
APIC
Mode
IRQ
VGA HDA EHCI 1
EHCI 2 SM
Bus
LAN SATA1 SATA2 PCI-EX
Root
Port 0
PCI-EX
Root
Port 1
PCI-EX
Root
Port 2
PCI-EX
Root
Port 3
PCI-EX
Root
Port 4
PCI-EX
Root
Port 5
PCI-EX
Port 0
PCI-EX
Port 1
PCI-EX
Port 2
PCI-EX
Port 3
PCI-EX
Port 4
PCI-EX
Port 5
A
INTB 16
x
x
x
x
x
2
x
5
x
4
x
3
x ²
x
5
B
INTC 17
x
x
x
3
x
2
x
5
x
4
x ³
x
2
C
INTD 18
x
x
x
4
x
3
x ²
x
5
x
4
x
3
D
INTA
19
x
x
x
x
5
x
4
x ³
x
2
x
5
x
4
E
20
x
F
21
G
22
x
H
23
x
Note
1
These interrupts are available for external devices/slots via the C-D connector rows.
2
Interrupt used by single function PCI Express devices (INTA).
3
Interrupt used by multifunction PCI Express devices (INTB).
4
Interrupt used by multifunction PCI Express devices (INTC).
5
Interrupt used by multifunction PCI Express devices (INTD).