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©
2011
congatec
AG
BM67_BS67m02
59/101
Signal
Pin #
Description
I/O
PU/PD
Comment
PCI_CLKRUN# D48
Bidirectional pin used to support PCI clock run protocol for mobile systems.
I/O 3.3V
PU 10k 3.3V
PCI_IRQA#
PCI_IRQB#
PCI_IRQC#
PCI_IRQD#
C49
C50
D46
D47
PCI interrupt request lines.
I 3.3V
PU 4K75 3.3V
PCI_CLK
D50
PCI 33MHz clock output.
O 3.3V
PCI_M66EN
D49
Module input signal indicates whether an off-module PCI device is capable of 66MHz operation.
Pulled to GND by Carrier Board device or by Slot Card if the devices are NOT capable of 66MHz
operation.
If the module is not capable of supporting 66MHz PCI operation, this input may be a no-connect on
the module.
If the module is capable of supporting 66MHz PCI operation, and if this input is held low by the
Carrier Board, the module PCI interface shall operate at 33MHz.
I 3.3V
Not connected
Note
The PCI interface is specified to be +5V tolerant, with +3.3V signaling.