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CMS80F731x Reference Manual
7.
I/O Port
7.1
GPIO Function
The chip has four sets of I/O ports: PORT0, PORT1, PORT2, PORT5.
PORTx is a bidirectional port. Its corresponding data direction register is PxTRIS. A bit set to 1 (=1) of the PxTRIS allows
the corresponding pin to be configured as an output. Zeroing one bit of PxTRIS (= 0) configures the corresponding POLTx pin
as the input.
When PORTx is used as an output port, the write Px register will write to the port latch, and all write operations are read-
modify-write operations. Therefore, writing a port means reading the pin level of that port, then modifying the value read, and
finally writing the changed value to the port data latch.
When PORTx is used as an output port, the Px register is read, which is related to the setting of the PxDS register. One
position of PxDS 1 (=1), the corresponding bit of Px read is the state of the pin, one bit of PxDS is cleared to zero out (=0), and
the corresponding bit of Px read is the state of the port data latch; When PORTx is used as an input port, the Px register reads
the state of the pin, regardless of the setting of the PxDS register.
When using the POLTx pin as an analog input, the user must ensure that the bits in the PxTRIS register remain in the set
0 state. I/O pins configured as analog inputs are always read as 0.
Registers related to PORTx ports include Px, PxTRIS, PxOD, PxUP, PxRD, PxDS, etc.
7.1.1
PORTx Data Register Px
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Px
Px7
Px6
Px5
Px4
Px3
Px2
Px1
Px0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset value
X
X
X
X
X
X
X
X
Register P0 Address: 0x80; Register P1 Address: 0x90; Register P2 Address: 0xA0; Register P5 address: 0xD8.
Bit7~Bit0
Px<7:0>:
Px I/O pin bits;
1=
Port pin level >V
IH
(forward threshold voltage);
0=
The port pin level < V
IL
(negative threshold voltage).
7.1.2
PORTx Direction Register PxTRIS
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
PxTRIS
PxTRIS7
PxTRIS6
PxTRIS5
PxTRIS4
PxTRIS3
PxTRIS2
PxTRIS1
PxTRIS0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset value
0
0
0
0
0
0
0
0
Register P0TRIS Address: 0x9A; Register P1TRIS Address: 0xA1; Register P2TRIS Address: 0xA2; Register P5TRIS address:
0xA5.
Bit7~Bit0
PxTRIS<7:0>:
Three-state control bit;
1=
The pins are configured as outputs;
0=
The pins are configured as inputs (tri-state).
Note:
1)
When a port is set to an output port, the data that reads the port is the value of the output register.
2)
After the port is set to the input port, the < read-modify-write instructions of the > type to the
port
are actually operations
on the output registers.