Cmsemicon CMS80F731 Series, Справочное руководство

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1.00
CMS80F731x Reference Manual
7.1.6
PORTx Slope Control Register PxSR
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
PxSR PxSR7 PxSR6 PxSR5 PxSR4 PxSR3 PxSR2 PxSR1 PxSR0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Reset value 0 0 0 0 0 0 0 0
Register P0SR Address: F00DH; Register P1SR Address: F01DH; Register P2SR Address: F02DH; Register P5SR address:
F05DH.
Bit7~Bit0
PxSR<7:0>: Px slope control register (in effect when the port is configured for output state);
1=
The Px pin is slow slope;
0=
The Px pin is fast slope.
7.1.7
The PORTx Data Input Selects Register PxDS
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
PxDS PxDS7 PxDS6 PxDS5 PxDS4 PxDS3 PxDS2 PxDS1 PxDS0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Reset value 0 0 0 0 0 0 0 0
Register P0DS Address: F00EH; Register P1DS Address: F01EH; Register P2DS Address: F02EH; Register P5DS address:
F05EH.
Bit7~Bit0
PxDS<7:0>: Data input selection bits that affect the value of the reading Px register when
configured for GPIO;
1=
Both output/input modes read pin status;
(The Smit circuit also remains open when the port is set to output);
0=
Output mode: read to data latch state;
Input Mode: Reads to pin state.
Note: If you need to read the pin state of the port when it is a multiplexing function input structure, you need to set the port
direction control to input mode.