CHAINTECH CT-9PJL, Руководство пользователя

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Appendix
16 Initial Early_Init_Onboard_Generator switch.
18
Detect CPU information including brand, SMI type (Cyrix or Intel®)
and CPU level (586 or 686).
1B
Initial interrupts vector table. If no special specified, all
H/W interrupts are directed to SPURIOUS_INT_HDLR & S/W
interrupts to SPURIOUS_soft_HDLR.
1D Initial EARLY_PM_INIT switch.
1F Load keyboard matrix (notebook platform).
21 HPM initialization (notebook platform)
23
1. Check validity of RTC value: e.g. a value of 5Ah is an invalid
value for RTC minute.
2. Load CMOS settings into BIOS stack. If CMOS checksum fails,
use default value instead.
3. Prepare BIOS resource map for PCI & PnP use. If ESCD is
valid, take into consideration of the ESCD’s legacy information.
4. Onboard clock generator initialization. Disable respective clock
resource to empty PCI & DIMM slots.
5. Early PCI initialization:
- Enumerate PCI bus number.
- Assign memory & I/O resource.
- Search for a valid VGA device & VGA BIOS, and put it into C000:0.
27 Initialize INT 09 buffer.
29
1. Program CPU internal MTRR (P6 & PII) for 0-640K memory
address.
2. Initialize the APIC for Pentium class CPU.
3. Program early chipset according to CMOS setup. Example:
onboard IDE controller.
4. Measure CPU speed.
5. Invoke video BIOS.
2D
1. Initialize multi-language.
2. Put information on screen display, including Award title, CPU
type, and CPU speed.
33 Reset keyboard except Winbond 977 series Super I/O chips.
3C Test 8254
3E
Test 8259 interrupt mask bits for channel 1.
70