BitFlow KBN-CL4-2.51-SP, Справочник по аппаратуре

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Preliminary
Memory Types The Karbon
KBN-6-2 BitFlow, Inc. Version F.0
6.2 Memory Types
6.2.1 Registers
?? Update. All registers are 64 bits wide and on 64-bit boundary. With the exception
of the DPM, only data bits 31 to 0 are used, bits 63 to 32 are always “don't care”. The
DPM uses all 64 bits. Out of the lower 32 LSBs, some registers use only a portion of
the bits. Registers can also be accessed as 32 bit wide. Little endian addressing is
used, i.e. MSB is bits 63-56.
For structure of the QL5064 register see QL documentation.
Note: There is no access to the QL5064 from the local bus
6.2.2 UART
The UART is 8 bit wide and its registers are on 64-bit boundary.
6.2.3 DPM
The DPM is 64 bit wide. The DPM can be accessed as 64-bit (on 64-bit boundary) or
as 32-bit wide (on 32-bit boundary) memory. During acquisition (GRAB/SNAP), the
slave read from DPM is inhibited. In this case, data read will be always zero.
6.2.4 TAG
At the start and the end of every frame there is an 8-byte long TAG quad. The source
address of the TAG is irrelevant as there is no data read. The destination is a special
trash can section of memory. The lower 4 bytes transferred are 13131313h. The upper
four bytes are undefined.
6.2.5 CTABs
For host access, the CTABs are on 64-bit boundaries. Access is simultaneous to both
the HCTAB and the VCTAB. The HCTAB is mapped on data bits 7 to 0; the VCTAB is
mapped on data bits 15 to 8. The VCTAB address is 17 bits, AD, i.e. 128K locations.
The HCTAB address is 15 bits, AD. The CTAB can be accessed only as 64 bit wide, i.e.
there is no provision for accessing less than 64 bits.