IPC@CHIP SC2x3
Hardware Manual V1.02 [01.03.09]
©2000-2009 BECK IPC GmbH
Page 25
6
Functional Description
6.1 Local Plus Bus
6.1.1 Features
The LocalPlus has the following features:
Interface to chip selected devices
Two main modes of operation:
-
non-MUXed Modes
Legacy Modes (Address 8, 16, or 24 bits, Data 8 or 16 bits)
Most Graphics Mode (Address 24 bits, Data 32 bits)
Large Flash Mode (Address 26 bits, Data 8 or 16 bits)
-
MUXed Modes
(Address 8, 16, 24 or 25 bits, Data 8,16 or 32 bits, 2 Bank Selects)
2 Chip Select (CS) signals
-
Programmable Wait States per CS
-
Programmable Deadcycles per CS
-
Programmable Byte Swapping per CS
Dynamic bus sizing on some interfaces
Support of BURST MODE FLASH devices
DMA (BestComm) support allows data movement independently from the CPU
NO support of misaligned accesses
6.1.2 Interface
The LocalPlus interface consists of:
Address bus
Data bus
Chip select signals CS1, 3, 4, 5, 6 and 7
Control signals:
-
R/W (Read/Write)
-
ALE (Address Latch Enable)
-
ACK (Acknowledge)
-
TS (Transfer Start)
-
OE (Output Enable)
-
TSIZ bits (Transfer Size)
-
Bank Select bits
Reference clock PCI_CLOCK
The reference clock PCI_CLOCK is always running, even if the PCI Controller is disabled.
