Artesyn Embedded Technology 6806800U78A, Инструкция по установке и эксплуатации

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Functional Description
SharpStreamer™ Pro Mini PCIE-7210-1 Installation and Use (6806800U78A )
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– x1 PCIe lane connected between the Skylake-H PCH and I219 PHY device.
– x1 PCIe lane connected between PEX9716 switch and I210 Ethernet Controller.
– x1 PCIe lane connected between PEX9716 switch and the Intel Quark SoC device. Each
lane operates at Gen 2 (5 GT/s).

Direct Media Interface
x4 wide Direct Media Interface (DMI) interface is connected between the Skylake
processor and Skylake PCH. Each lane operates at 5GT/s.

DDR4
Intel Skylake processor has two memory channels. Each channel of the processor is
connected with DDR4 SODIMM 1DIMM Per Channel (DPC).

DDR3
Intel quark processor has one memory channel. The channel of the processor is connected
with DDR3 device.

USB2.0
– One port of Skylake PCH USB port interfaced with front panel Micro USB connector for
data transfer.
– One port of Quark SoC processor USB port interfaced with front panel Micro USB
connector for data transfer.

Media Dependent interface
Media Dependent interface (MDI) is connected between the I219 PHY device and I210
Ethernet controller.

Low Pin Count
The Low Pin Count (LPC) interface is used between CPLD and Skylake PCH device. This
interface operates at a clock of 33 MHz.
3.6.2 Low Speed Serial Interface
3.6.2.1 Two-wire interface

System Management Logic
The System Management Logic (SML) is a low speed connection for low power state mode
for manageability communication.

System Management Bus