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New iStar ICCD
Pre-Acquisition Setup - CCD
5.3.3 - binning
Binning
is a process that allows charge from two or more
pixels
to be combined on the
CCD
-chip prior to readout.
Summing charges on the CCD and doing a single readout gives better noise performance than reading out several
pixels and then summing them in computer memory. This is because each act of reading out charges from the CCD
contributes to noise.
Combining both the vertical and horizontal binning methods produces ‘
superpixels
’. These consist of two or more
individual pixels that are binned and read out as one large pixel. Thus the whole CCD, or a selected sub-area becomes a
matrix of superpixels.
On the one hand superpixels result in a loss of spatial resolution when compared to single pixel readout, but on the other
hand they offer the advantage of summing data on-chip prior to readout, thereby producing a better signal-to-noise ratio
and a higher frame rate.
5.3.3.1 - Vertical binning
Charges from two or more rows of the CCD-chip are moved down into the shift register before the charges are read out.
The number of rows shifted depends on the binning pattern selected. Thus, for each column of the CCD-chip, charges
from two or more vertical elements are
summed
into the corresponding element of the shift register. The charges from
each of the pixels in the shift register are then clocked horizontally to the output amplifier and read out.
1.
Single-Track
: Charges are vertically binned and read out from a number of user-selected adjacent rows of
pixels on the CCD-sensor. The rows form a single track across the full width of the CCD-sensor.
2.
Multi-Track
: This mode differs from single-track in that user now defines two or more tracks (groups of rows)
on the CCD from which to read out charges. In processing terms, each track is treated as in single track.
3.
Full Vertical Binning (FVB)
: Charges from each complete column of pixels on the CCD are moved down and
summed into the shift register, and the charge is then shifted horizontally one pixel at a time from the shift
register into the output node - in effect a value is read out for each complete column of the CCD-sensor. This
mode is typically used for spectroscopy (please refer to section 5.3.3.3).
The example below illustrates readout of data from adjacent tracks, each track comprising two binned rows of the sensor.
1
Exposure to light causes a pattern of charge (an electronic image) to build up on the frame (or ‘image area’) of the CCD-sensor.
2
Charge in the frame is shifted vertically by one row, so that the bottom row of charge moves down into the shift register.
3
Charge in the frame is shifted vertically by a further row, so that the next row of charge moves down into the shift register, which now contains
charges from two rows - i.e. the charges are vertically binned
4
Charges in the shift register are moved horizontally by one pixel, so that charges on the endmost pixel of the shift register are moved into the
output node of the amplifier.
5
The charges in the output node of the amplifier are passed to the analog-to-digital converter and are read out (digitized).
6
Steps 4 and 5 are repeated until the shift register is empty. The process is repeated from Step 2 until the whole frame is read out.
