
H D LTEK
HT48R06A-1/HT48C06
Pad Description
Pad Name
I/O
O ptio ns
Description
PA0~PA7
I/O
Pull-high*
W ake-up
Bidirectional 8-bit input/output port. Each bit can be configured as wake-up
input by options. Software instructions determ ine the CM OS output or
Schm itt trigg e r input with a pull-high resistor (determ ined by pull-high o p
tions).
PB0/BZ
PB1/BZ
PB2
I/O
Pull-high*
I/O o r BZ/BZ
Bidirectional 3-bit input/output port. Software instructions determ ine the
CM OS output or Schm itt trigger input with a pull-high resistor (determined by
pull-high options).
The PBO and PB1 are pin-shared with the BZ and BZ, respectively. Once the
PBO and PB1 are selected as buzzer driving outputs, the output signals come
from an internal PFD generator (shared with a tim er/event counter).
VSS
—
—
Negative pow er supply, ground
PC0/INT
PC1/TMR
I/O
Pull-high*
Bidirectional I/O lines. Softw are instructions determ ine the CM OS output or
Schm itt trigg e r input with a pull-high resistor (determ ined by pull-high o p
tions). The external interrupt and tim er input are pin-shared with the PCO and
PC1, respectively. The external interrupt input is activated on a high to low
transition.
RES
I
—
Schm itt trigg e r reset input. Active low
VDD
—
—
Positive pow er supply
OSC1
OSC2
I
O
Crystal
o r RC
OSC1, OSC2 are connected to an RC netw ork or Crystal (determ ined by op
tions) fo r the internal system clock. In the case o f RC operation, OSC2 is the
output term inal fo r 1/4 system clock.
* All pull-high resistors are controlled by an option bit.
Absolute Maximum Ratings
S upply V o lta g e ..............................
V
s s
- 0 . 3 V
to
V
s s
+ 6 . 0 V
Storage T em perature................................ -5 0 °C to 125°C
Input V o lta g e ..................................V
ss
- 0.3V to V
dd
+0.3V
Operating Tem perature...............................- 4 0 oC to 85°C
Note: These are stress ratings only. Stresses exceeding the range specified under "Absolute M aximum Ratings" may
cause substantial dam age to the device. Functional operation of this device at other conditions beyond those
listed in the specification is not implied and prolonged exposure to extrem e conditions may affect device reliabil
ity.
5 3 / 7 3
Содержание PDP4225M
Страница 14: ...Block Diagram MAIN AUDIO BOARD 12 73...
Страница 16: ......
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Страница 29: ...Audio Board BH M CH 05 06 14 sch 1 Tue Aug 16 22 15 14 2005 26 73...
Страница 30: ...DUBHE OSD Ver1 1 NAKS sch 1 Mon Oct 1B 11 47 11 2004 27 73...
Страница 33: ......
Страница 34: ...Main Video Main Power Supple____ Sub Power Supple EMI F ilter AC Intel Audio 30 73...
Страница 70: ...ifl Z 2 3 2 PANEL DATASHEET...
Страница 71: ...3 W Hc jn hB D i n I...